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IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 1 features ? ? dual ? output ?? (2+1) ? digital ? controller ? with ? proprietary ? control ? algorithm ?? ? two \ phase ? operation ? available ? on ? output ? #1 ? for ? powering ? very ? high ? current ? asics ? and ? dsps ? ? i2c ? /pmbus ? interface ? for ? configuration ? & ? telemetry ? with ? pin ? programmable ?? address ? ? operating ? ambient ? temperature: ?\ 40 0 c ? to ? 85 0 c ?? ? 3.3v ? bias ? operation ? ? independent ? loop ? switching ? frequencies ? from ? 200khz ? to ? 2mhz ? per ? phase ? ? ir ?? efficiency ? shaping ? with ? dynamic ? phase ? control ? (dpc) ? ? active ? diode ? emulation ? modes ? for ?? light ? load ? efficiency ? ? ir ? adaptive ? transient ? algorithm ? (ata) ? minimizes ? output ? bulk ? capacitors ? and ? system ? cost ? ? independent ?? ovp, ? uvp, ? ocp ? for ? each ? output ? ? thermal ? protection ? (otp) ? and ? vrhot# ? flag ? ? multiple ? time ? programmable ? (mtp) ? memory ? for ? custom ? configuration ? ? flexible ? i2c ? bus ? security ? features ?? ? pb \ free, ? rohs, ? 32 \ pin ? 5mm ? x ? 5mm ? qfn ? package ? ? ? ? ? ? basic ? application ? ? ? figure ? 1: ? IR36021 ? basic ? application ? circuit ? description ? the ? IR36021 ? is ? a ? dual \ loop ? digital ? multi \ phase ? buck ? controller ? designed ? for ? point ? of ? load ? applications. ?? ? the ? IR36021 ? include ? efficiency ? shaping ? technology ? to ? deliver ? exceptional ? efficiency ? at ? minimum ? cost ? across ? the ? entire ? load ? range. ? dynamic ? phase ? control ? adds/drops ? active ? phases ? based ? upon ? load ? current ? and ? can ? be ? configured ? to ? enter ? 1 \ phase ? operation ? and ? diode ? emulation ? mode ? automatically ? or ? by ? command. ? ? ir?s ? unique ? adaptive ? transient ? algorithm ? (ata), ? based ? on ? proprietary ? non \ linear ? digital ? pwm ? algorithms, ? minimizes ? output ? bulk ? capacitors ? and ? multiple ? time ? programmable ? (mtp) ? storage ? saves ? pins ? and ? enables ? a ? small ? package ? size. ? device ? configuration ? and ? fault ? parameters ? are ? easily ? defined ? using ? the ? ir ? intuitive ? power ? designer ? (ipd) ? gui ? and ? stored ? in ? on \ chip ? mtp. ? ? the ? IR36021 ? provides ? extensive ? ovp, ? uvp, ? ocp ? and ? otp ? fault ? protection ? and ? includes ? thermistor ? based ? temperature ? sensing ? with ? vrhot ? signal. ? ? the ? IR36021 ? includes ? numerous ? features ? like ? register ? diagnostics ? for ? fast ? design ? cycles ? and ? platform ? differentiation, ? truly ? simplifying ? vrd ? design ? and ? enabling ? fastest ? time \ to \ market ? (ttm) ? with ? ?set \ and \ forget? ? methodology. ? ? applications ? ? embedded ? telecom ? systems ? ? netcom ? applications ? ? server ? application ? ? distributed ? point ? of ? load ? power ? architectures ? pin ? diagram ? ? addr_prot isen2 sm_dio irtn2 en1 isen1b isen1a irtn1a irtn1b sm_clk vinsen sm_alert rcsp1 rcsm1 vrhot_icrit nc ? figure ? 2: ? IR36021 ? package ? top ? view ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 2 pin ? diagram ? ? pwm2 vrtn1 vsen1 tsen v18a rres vcc pwm1b pwm1a rcsm2 rcsp2 pgood2 vrtn2 vsen2 1 2 7 8 5 6 3 4 20 19 22 21 24 23 17 18 33 gnd 32 pin 5x5 qfn top view 10 14 12 11 15 13 16 9 31 27 29 30 26 28 25 32 pgood1 en2 ? ? figure ? 3: ? IR36021 ? package ? bottom ? view ? 5mm ? x ? 5mm ? qfn ? ? ordering ? information ? ? ? package ? tape ? and ? reel ? qty ? part ? number ? m ? 3000 ? IR36021mtrpbf ? ? ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 3 functional ? block ? diagram ? isen1a irtn1a isen1b irtn1b isen2 irtn2 tsen vinsen voltage adc vsen1 vrtn1 control and monitoring pwm generator vout1_error vout2_error pwm1a pwm1b pwm2 reference, oscillator, state control, interfaces, registers and mtp sm_dio adc clocks mux clocks phase_period_1 phase_period_2 v3_3 iout vin temp fault bus system clock iout vin temp vout fault bus system clock vid_1 vid_2 current & monitor adc itot_1 itot_2 ip1a ip1b ip1a ip1b itot2 mode control ldo vcc 1.8v v18a sm_clk en1 pgood1 pgood2 phase_ period_1 phase_ period_2 rres rcsp1 rscm1 afe_1 vid_1 vsen2 vrtn2 rcsp2 rscm2 afe_2 vid_2 mtp addr_prot itot_2 programming chargepump en2 sm_alert# vrhot_icrit# ?????????????????????????? figure ? 4: ? IR36021 ? simplified ? block ? diagram ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 4 +3.3v vo1 vinsen pwm1b pwm1a pgood1 vsen1 vcc rres v18a vrtn1 irtn1a rcsp1 irtn1b rcsm1 isen1b isen1a vin l o a d rcs ccs r series r series r th r vin_1 r vin_2 pgood2 tsen r th2 gnd pwm2 isen2 irtn2 addr_prot vo2 l o a d vsen2 vrtn2 en2 v from system sm_clk sm_dio v sm_alert# rcsp2 rcsm2 rcs ccs r series r series r th en1 v vrhot_icrit# v v vcc gnd pwm 5v v boot switch 12v vdrv vcc gnd pwm 5v v boot switch 12v vdrv vcc gnd pwm 5v v boot switch 12v vdrv ????? ???????????????????? figure ? 5: ? dual \ loop ? vr ? using ? IR36021 ? controller ? and ? ir ? powerstage ? in ? 2+1 ? configuration ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 5 +3.3v vinsen pwm1b pwm1a pgood1 vsen1 vcc rres v18a vrtn1 irtn1a rcsp1 rcsm1 vin rcs ccs r series r series r th r vin_1 r vin_2 pgood2 tsen r th2 gnd pwm2 isen2 irtn2 addr_prot vsen2 vrtn2 en2 v from system sm_clk sm_dio v sm_alert# rcsp2 rcsm2 rcs ccs r series r series en1 v vrhot_icrit# v v vo1 irtn1b isen1b isen1a l o a d vcc gnd pwm 5v v boot switch 12v vdrv vcc gnd pwm 5v v boot switch 12v vdrv ? figure ? 6: ? dual \ loop ? vr ? using ? IR36021 ? controller ? and ? ir ? powerstage ? in ? 2+0 ?? configuration ?? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 6 v v v v v v ? figure ? 7: ? dual \ loop ? vr ? using ? IR36021 ? controller ? and ? ir ? powerstage ? in ? 1+1 ?? configuration
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 7 pin ? description ? ? pin ? # ? pin ? name ? pin ? description ? 1 ? pgood2 ? voltage ? regulator ready ? output ? (loop ? #2). ? open \ drain ? output ? that ? asserts ? high ? when ? the ? vr ? has ? completed ? soft \ start ? to ? loop ? #2 ? boot ? voltage. ? 2 ? vsen1 ? voltage ? sense ? input ? loop#1 . ? this ? pin ? is ? connected ? directly ? to ? the ? vr ? output ? voltage ? of ? loop ? #1 ? at ? the ? load ? and ? should ? be ? routed ? differentially ? with ? vrtn ? 3 ? vrtn1 ? voltage ? sense ? return ? input ? loop#1. ? this ? pin ? is ? connected ? directly ? to ? loop#1 ? ground ? at ? the ? load ? and ? should ? be ? routed ? differentially ? with ? vsen. ? 4 ? rres ? current ? reference ? resistor. ? a ? 1% ? resistor ? is ? connected ? to ? this ? pin ? to ? set ? an ? internal ? precision ? current ? reference ? 5 ? tsen ? ntc ? temperature ? sense ? input. ? an ? ntc ? network ? is ? connected ? to ? this ? pin ? to ? measure ? temperature. ?? 6 ? v18a ? 1.8v ? decoupling. ? two ? capacitors ? on ? this ? pin ? provide ? decoupling ? for ? the ? internal ? 1.8v ? supply ? 7 ? pgood1 ? voltage ? regulator ? ready ? output ? (loop ? #1). ? open \ drain ? output ? that ? asserts ? high ? when ? the ? vr ? has ? completed ? soft \ start ? to ? loop ? #1 ? boot ? voltage. ? 8 ? en2 ? vr ? enable ? input. ? enable ? is ? an ? active ? high ? system ? input ? to ? power \ on ? the ? regulator, ? provided ? vin ? and ? vcc ? are ? present. ? enable ? is ? not ? pulled ? up ? on ? the ? controller. ? when ? enable ? is ? pulled ? low, ? the ? controller ? de \ asserts ? pgood2 ? and ? shuts ? down ? the ? regulator. ? 9 ? vinsen ? vin ? voltage ? sense ? input. ? this ? is ? used ? to ? detect ? a ? valid ? 5v \ 12v ? supply ? voltage ? and ? measure ? the ? input ? voltage ? to ? the ? vr. ? 10 ? nc ?? 11 ? vrhot \ icrit ? vrhot_icrit# ? output. ? active ? low ? alert ? pin ? that ? can ? be ? programmed ? to ? assert ? if ? temperature ? or ? average ? load ? current ? exceeds ? user \ definable ? thresholds. ? 12 ? en1 ? vr ? enable ? input. ? enable ? is ? an ? active ? high ? system ? input ? to ? power \ on ? the ? regulator, ? provided ? vin ? and ? vcc ? are ? present. ? enable ? is ? not ? pulled ? up ? on ? the ? controller. ? when ? enable ? is ? pulled ? low, ? the ? controller ? de \ asserts ? pgood1 ? and ? shuts ? down ? the ? regulator. ? 13 ? addr_prot ? bus ? address ? & ? i2c ? bus ? protection a ? resistor ? to ? ground on ? this ? pin ? defines ? the ? i2c ? address ? which ? is ? latched ? when ? vcc ? becomes ? valid. ? subsequently, ? this ? pin ? becomes ? a ? logic ? input ? to ? enable ? or ? disable ? communication ? on ? the ? i2c ? bus, ? 14 ? sm_alert ? smbus ? alert ? line ? 15 ? sm_dio ? serial ? data ? line ? i/o. ? i2c ? bus ? bi \ directional ? serial ? data ? line. ? 16 ? sm_clk ? serial ? clock ? line ? input. ? i2c ? bus ? clock ? input. ? 17 ? pwm1a ? loop ? 1 ? phase ? 1 ? pulse ? width ? modulation ? output. pwm ? signal ? pin ? which ? is ? connected ? to ? the ? input ? of ? an ? external ? mosfet ? gate ? driver. ? the ? power \ up ? state ? is ? high \ impedance ? until ? enable ? goes ? active. ? refer ? to ? the ? tbd ? section ? for ? unused/disabled ? phases. ? 18 ? pwm1b ? loop ? 1 ? phase ? 2 ? pulse ? width ? modulation ? output. pwm ? signal ? pin ? which ? is ? connected ? to ? the ? input ? of ? an ? external ? mosfet ? gate ? driver. ? the ? power \ up ? state ? is ? high \ impedance ? until ? enable ? goes ? active. ? refer ? to ? the ? tbd ? section ? for ? unused/disabled ? phases. ? 19 ? pwm2 ? loop ? 2 ? pulse ? width ? modulation ? output. pwm ? signal ? pin ? which ? is ? connected ? to ? the ? input ? of ? an ? external ? mosfet ? gate ? driver. ? the ? power \ up ? state ? is ? high \ impedance ? until ? enable ? goes ? active. ? refer ? to ? the ? tbd ? section ? for ? unused/disabled ? phases. ? 20 ? vrtn2 ? voltage ? sense ? return ? input ? loop#2. ? this ? pin ? is ? connected ? directly ? to ? loop#2 ? ground ? at ? the ? load ? and ? should ? be ? routed ? differentially ? with ? vsen. ? 21 ? vsen2 ? voltage ? sense ? input ? loop#1 . ? this ? pin ? is ? connected ? directly ? to ? the ? vr ? output ? voltage ? of ? loop ? #2 ? at ? the ? load ? and ? should ? be ? routed ? differentially ? with ? vrtn ? 22 ? vcc ? input ? supply ? voltage. ? 3.3v ? supply ? to ? power ? the ? device ? 23 ? rcsm2 ? resistor ? current ? sense ? minus ? loop ? 2 . ? this ? pin ? is ? connected ? to ? an ? external ? network ? to ? set ? the ? loadline ? slope, ? bandwidth ? and ? temperature ? compensation ? for ? loop ? #2. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 8 pin ? # ? pin ? name ? pin ? description ? 24 ? rcsp2 ? resistor ? current ? sense ? positive ? loop ? 2 . ? this ? pin ? is ? connected ? to ? an ? external ? network ? to ? set ? the ? loadline ? slope, ? bandwidth ? and ? temperature ? compensation ? for ? loop ? #2. ? 25 ? isen2 ? loop ? 2 ? current ? sense ? input. ? loop ? 2 ?? sensed ? current ? input ? (+) ?? 26 ? irtn2 ? loop ? 2 ? current ? sense ? return ? input. ? loop ? 2 ? sensed ? current ? input ? return ? ( \ ) ?? 27 ? isen1b ? loop1 ? phase ? 2 ? current ? sense ? input. ? phase ? 2 ? sensed ? current ? input ? (+) ?? 28 ? irtn1b ? loop ? 1 ? phase ? 2 ? current ? sense ? return ? input. ? phase ? 2 ? sensed ? current ? input ? return ? ( \ ) ?? 29 ? isen1a ? loop1 ? phase ? 1 ? current ? sense ? input. ? phase ? 1 ? sensed ? current ? input ? (+) ?? 30 ? irtn1a ? loop1 ? phase ? 1 ? current ? sense ? return ? input. ? phase ? 1 ? sensed ? current ? input ? return ? ( \ ) ?? 31 ? rcsp1 ? resistor ? current ? sense ? positive ? loop#1 . ? this ? pin ? is ? connected ? to ? an ? external ? network ? to ? set ? the ? loadline ? slope, ? bandwidth ? and ? temperature ? compensation ? for ? loop ? #1 ? 32 ? rcsm1 ? resistor ? current ? sense ? minus ? loop#1 . ? this ? pin ? is ? connected ? to ? an ? external ? network ? to ? set ? the ? loadline ? slope, ? bandwidth ? and ? temperature ? compensation ? for ? loop ? #1 ? 33 ? gnd ? ground. ground ? reference ? for ? the ? ic. ? the ? large ? metal ? pad ? on ? the ? bottom ? must ? be ? connected ? to ? ground. ? ? ?? ? ? ? ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 9 absolute ? maximum ? ratings ? ? supply ? voltage ? (vcc) ? gnd \ 0.3v ? to ?? 4.0v ? rcspx, ? rcsmx ?? 0 ? to ? 2.2 ? v ? vsenx, ?? vrtnx, ?? isenx, ? irtnx ? gnd \ 0.2v ?? to ?? 2.7v ? rres, ? v18a, ? tsen, ? vinsen ? gnd \ 0.2v ?? to ?? 2.2v ? pwmx ? gnd \ 0.3v ? to ? vcc ? pgoodx, ? enx, ? addr_prot, ? vrhot_icrit# ? gnd \ 0.3v ? to ?? vcc ? sm_dio, ? sm_clk, ? sm_alert ? gnd \ 0.3v ? to ?? 5.5v ? esd ? rating ? ? human ? body ? model ? 200v ? machine ? model ? 200v ?? charge ? device ? model ? 1000v ?? moisture ? sensitivity ? level ???????????? jedec ? level ? 2@260c ?? ? ? thermal ? information ? ? thermal ? resistance ? ( ja ? ? & ? jc ) * ? 29oc/w ? & ? 3c/w ?? maximum ? operating ? junction ? temperature ?\ 40c ?? to ? +125c ? maximum ? storage ? temperature ? range ? \ 65c ? to ? +150c ? maximum ? lead ? temperature ? (soldering ? 10s) ? (soic ?\? lead ? tips ? only) ? 300c ? ? * ?? ja ? is ? measured ? with ? the ? component ? mounted ? on ? a ? high ? effective ? thermal ? conductivity ? test ? board ? in ? free ? air. ? stresses ? beyond ? those ? listed ? under ? ?absolute ? maximum ? ratings? ? may ? cause ? permanent ? damage ? to ? the ? device. ? these ? are ? stress ? ratings ? only ? and ? functional ? operation ? of ? the ? device ? at ? these ? or ? any ? other ? conditions ? beyond ? those ? indicated ? in ? the ? operational ? sections ? of ? the ? specifications ? are ? not ? implied. ? these ? devices ? are ? esd ? sensitive, ? observe ? handling ? precautions ? to ? prevent ? electrostatic ? discharge ? damage. ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 10 electrical ?? specifications ? ? recommended ? operating ? conditions ? ? symbol ? definition ? min ? max ? units vcc ? supply ? voltage ? 2.9 ? 3.63 ? v ? t a ? ambient ? temperature ? 0 ? 85 ? c ? ?? the ? electrical ? characteristics ? table ? lists ? the ? spread ? of ? values ? guaranteed ? within ? the ? recommended ? operating ? conditions. ? typical ? values ? represent ? the ? median ? values, ? which ? are ? related ? to ? 25c. ?? ? electrical ? characteristics ? parameter ? symbol ? conditions ? min ? typ ? max ? unit ? supply ? vcc/gnd ? ? supply ? voltage ? v cc ?? 2.9 ? 3.3 ? 3.63 ? v ? supply ? current ? i vcc ? pwm ? not ? switching ? 95 ? 105 ? 125 ? ma ? 3.3v ? uvlo ? turn ? on ? threshold ? ?? ? 2.80 ? 2.9 ? v ? v ? 3.3v ? uvlo ? turn ? off ? threshold ? ?? 2.6 ? 2.7 ?? input ? voltage ?? sense ? input ? input ? impedance ?? ? 1 ??? m ? input ? range ? ? v12 ? with ? 14:1 ? divider ? 0 ? 0.857 ? 1.1 ? v ? ? uvlo ? turn ? on ? programmable ? range 1 ? ? with ? 14:1 ? divider ?? 4.5 \ 15.9375 ?? v ? uvlo ? turn ? off ? programmable ? range 1 ? ? with ? 14:1 ? divider ?? 4.5 \ 15.9375 ?? v ? ovp ? threshold ? (if ? enabled) ?? desktop ? mode ? 14.3 ? 14.6 ? 14.9 ? v ? notebook ? mode ?? 23.5 ?? v ? reference ? voltage ? and ? dac ? ? ? ? ? ? ? boot ? voltage ? range 1 ? ? ?? 0.25 \ 1.52 ?? v ? system ? accuracy 3 ? ? ? vid ? = ? 1.55v \ 2.3v ?\ 1.1 ?? 1.1 ? %vid ? vid ? = ? 1.0v?1.5v ?? \ 0.5 ?? 0.5 ? %vid ? vid ? = ? 0.8 ? ?0.995v ?\ 5.0 ?? 5.0 ? mv ? vid ? = ? 0.25 ? ?0.795v ?\ 8 ?? 8 ? mv ? external ? reference ? resistor ? rres ? 1% ? external ? bias ? resistor ?? 7.5 ?? k ? oscillator ? & ? pwm ? generator ? internal ? oscillator 1 ? ? ?? 96 ?? mhz ? frequency ? accuracy 2 ?? ?\ 2.5 ?? 2.5 ? % ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 11 parameter ? symbol ? conditions ? min ? typ ? max ? unit ? pwm ? frequency ? range 1 ? ? ?? 200 \ 2000 ?? khz ? pwm ? frequency ? step ? size 1 ?? ? ?? 0.83 \ 83 ?? khz ? pwm ? resolution 1 ? ? ??? 160 ? ps ? ntc ? temperature ? sense ? tsen1 ? ? output ? current ?? for ? tsen ? = ? 0 ? to ? 1.2v ? 96 ? 100 ? 104 ? a ? accuracy 1 ?? at ? 100c ? (ideal ? ntc) ? 96 ??? 104 ? c ? digital ? inputs ? ? ? low ? vth ? type ? 1 ? en, ? vr_hot ? (during ? por) ? ?? input ? high ? voltage ?? ?? 0.7 ? \ ? \ ? v ? input ? low ? voltage ?? ?? \? \? 0.35 ? v ? input ? leakage ? current ?? vpad ? = ? 0 ? to ? 2v ?\? \ ? 5 ? a ? digital ? inputs ?\? lvttl ? sm_dio, ? sm_clk, ? addr_prot ? ?? ? input ? voltage ? high ? ? ? ?? 2.1 ? ? ? ? ? v ? input ? voltage ? low ? ? ? ?? ?? ?? 0.8 ? v ? input ? leakage ? ? ? vpad=0 ? to ? 3.6v ????? 1 ? a ? remote ? voltage ? sense ? inputs ? vsen, ? vrtn, ? vsen_l2, ? vrtn_l2 ? ? vsenx ? input ? current ?? ? vout ? = ? 0.5v ? to ? 1.5v ??\ 250 ? to ? +250 ?? ua ? vrtnx ? input ? current ?? ? ? \ 500 ?? ua ? differential ? input ? voltage ? range 1 ? ? vrtn= ? 100mv ? ? 0 ?? to ? 2.6 ?? v ? vrtn ? input ? cm ? voltage 1 ??? ?? ? ?\ 100 ? to ? 100 ?? mv ? remote ? current ? sense ? inputs ? isen/irtnx ? ? voltage ? range 1 ?? ??\ 0.1 ? to ? 2.7 ?? v ? analog ? address/level ? inputs ? addr_prot ? 16 ? levels ? ?? output ? current 1 ?? vpad ? = ? 0 ? to ? 1.2v ? 96 ? 100 ? 104 ? a ? open \ drain ? outputs ?\? 4ma ? drive ? pgood1, ? pgood2, ? sm_dio, ? sm_alert ? ? ? ? ? ? ? ? ? ? ? output ? low ? voltage ? ? ? ? 4ma ????? 0.3 ? v ? output ? leakage ? ? ? vpad=0 ? to ? 3.6v ????? 5 ? a ? open \ drain ? outputs ?\? 20ma ? drive ? vrhot_icrit# ? ? ? output ? low ? voltage ? 1 ? ? ? i=20ma ????? 0.26 ? v ? on ? resistance 1 ? ? ? i=20ma ? 7 ? 9 ? 13 ???? tri \ state ? leakage ? i leak ? vpad=0 ? to ? 3.6v ??? 5 ? a ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 12 parameter ? symbol ? conditions ? min ? typ ? max ? unit ? pwm ? i/o ? ? pwmx ? ? output ? low ? voltage ? (tri \ state ? mode) ?? ? i= \ 4ma ????? 0.4 ? v ? output ? high ? voltage ? (tri \ state ? mode) ? ? ? i=+4ma ? 2.9 ????? v ? tri \ state ? leakage ? ? ? ? vpad ? = ? 0 ? to ? vcc ????? 1 ? a ? pwm ? auto \ detect ? inputs ? (when ? 3.3v ? is ? applied) ? ? ? if ? enabled ? ? input ? voltage ? high ? ? ? ?? 1.3 ? ? ? ? ? v ? ????? input ? voltage ? low ?? ? ??? 0.5 ? v ? i2c/pmbus ? & ? reporting ? ? ? bus ? speed ? 1 ?? normal ?? 100 ?? khz ? fast ?? 400 ?? maximum ?? 1000 ?? iout ? & ? vout ? filter ? 1 ?? selectable ?? 3.2 ? or ? 52 ?? hz ? iout ? & ? vout ? update ? rate ? 1 ?? ? ? 20.8 ?? khz ? vin ? & ? temperature ? filter ? 1 ?? selectable ?? 3.2 ? or ? 52 ?? hz ? vin ? & ? temperature ? update ? rate ? 1 ? ?? ? 20.8 ?? khz ? vin ? range ? reporting ? 1 ? ? ? ? with ? 14:1 ? divider ?? 0 \ 15 ?? v ? with ? 22:1 ? divider ?? 0 \ 25 ?? vin ?? accuracy ? reporting ?? with ? 1% ? resistors, ??? ? \ 2 ?? +2 ? % ? vin ?? resolution ? reporting ? 1 ?? ? ? 62.5 ? ? mv ? vout ?? range ? reporting ? 1 ?? ? ? ? 2.2 ? v ? vout ?? accuracy ? reporting ? 1 ? ? ? ? no ? load \ line ?? ? ? 0.5 ?? % ? vout ?? resolution ? reporting ? 1 ?? vout ? < ? 2v ?? 7.8 ?? mv ? iout ?? range ? reporting ? 1 ?? per ? phase ? 0 ?? 62 ? a ? iout ?? accuracy ? reporting ? 1 ?? maximum ? load, ? all ? phases ? active ? (based ? on ? dcr, ? ntc ? and ? # ? active ? phases) ? ? 2 ?? % ? iout ?? resolution ? reporting ? 1 ? ? loop ? 1 ? (iout<80a) ?? 0.5 ?? a ? ? loop ? 2 ? (iout<40a) ?? 0.25 ?? temperature ? range ? reporting 1 ?? ? 0 ?? 135 ? c ? temperature ?? accuracy ? reporting ? 1 ? ? at ? 100c, ? with ? ideal ? ntc ?\ 4 ?? 4 ? % ? temperature ?? resolution ? reporting ? 1 ? ?? ? 1 ?? c ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 13 parameter ? symbol ? conditions ? min ? typ ? max ? unit ? fault ? protection ? ? ? ovp ? threshold ? during ? start \ up ? (until ? output ? reaches ? 1v) ? ? selectable ?? 1.2 ? 1.275 ? 1.35 ? v ? ovp ? operating ? threshold ? 1 ? (programmable) ? ? relative ? to ? vid ? (selectable) ?? 150 \ 500 ?? mv ? ovp ? filter ? delay ? 1 ? ? ?? 160 ?? ns ? output ? uvp ? threshold ? 1 ? (programmable) ? ? relative ? to ? vid ? (selectable) ??\ 150 ? to ?\ 500 ?? mv ? fast ? ocp ? range ? 1 ??? ? per ? phase ?? 0 \ 62 ?? a ? fast ? ocp ? filter ? bandwidth ? 1 ? ? ?? 60 ?? khz ? slow ? ocp ? filter ? bandwidth ? 1 ? ? programmable ? (equal ? to ? telemetry ? band \ width) ? ? 3.2 ? or ? 52 ?? hz ? ocp ? system ? accuracy ? 1 ? ? system ? excluding ? dcr/sense ? resistor ? ? 2 ?? % ? vr_hot ? range 1 ? ? ?? 64 ? to ? 127 ?? c ? otp ? range 1 ? ? vr_hot ? level ? + ? otp ? range ?? 64 ? to ? 135 ?? c ? dynamic ? phase ? control ?? ? ? ? ? ? ? current ? filter ? bandwidth ? 1 ? ? for ? phase ? drop ? ? 5.3 ? ? khz ? timing ? information ? ? ? ? ? ? ? automatic ? configuration ? from ? mtp ? 1 ? t 3 \ t 2 ? ? (figure ? 8) ? 3.3v ? ready ? to ? end ? of ? configuration ? ? ? 1 ? ms ? automatic ? trim ? time ? 1 ? t 4 \ t 3 ? (figure ? 8) ? ? ? ? 4 ? ms ? en ? delay ? (to ? ramp ? start) ? 1 ? ? ? ? 3 ? ? us ? vid ? delay ? (to ? ramp ? start) ? 1 ? ? loop ? bandwidth ? dependent ? ? 5 ? ? us ? pgood1/pgood2 ? delay ? 1 ? ? after ? reaching ? boot ? voltage ? ? 20 ? ? us ? ?? ? ? notes ?? 1. guaranteed ? by ? design ? but ? not ? tested ? in ? production ? 2. pwm ? operating ? frequency ? will ? vary ? slightly ? as ? the ? number ? of ? phases ? changes ? (increases/decreases) ? because ? of ? the ? internal ? calculation ? involved ? in ? dividing ? a ? switching ? period ? evenly ? into ? the ? number ? of ? active ? phases. ? 3. system ? accuracy ? is ? for ? a ? temperature ? range ? of ? 0c ? to ? +85c. ? accuracies ? will ? derate ? by ? a ? factor ? of ? 1.5x ? for ? temperatures ? outside ? the ? 0c ? to ? +85c ? range. ? ? ? ? ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 14 general ? description ? ? the ? IR36021 ? is ? a ? flexible, ? dual \ loop ? (dual \ channel), ? digital ? multiphase ? pwm ? buck ? controller ? optimized ? to ? convert ? a ? 12v ? input ? supply ? to ? a ? voltage ? below ? 2.445v ? (for ? vcc>3.1v). ? it ? is ? easily ? configurable ? for ? 1 \ 2 ? phase ? operation ? on ? loop ? #1 ? and ? 0 \ 1 ? phase ? operation ? on ? loop ? #2. ? the ? unique ? partitioning ? of ? analog ? and ? digital ? circuits ? within ? the ? IR36021 ? provides ? the ? user ? with ? easy ? configuration ? capability ? while ? maintaining ? the ? required ? accuracy ? and ? performance. ? access ? to ? on \ chip ? multiple ? time ? programming ? memory ? (mtp) ? to ? store ? the ? IR36021 ? configuration ? parameters ? enables ? power ? supply ? designers ? to ? optimize ? their ? designs ? without ? changing ? external ? components. ?? the ? IR36021 ? controls ? two ? independent ? output ? voltages. ? each ? voltage ? is ? controlled ? in ? an ? identical ? fashion, ? so ? that ? the ? user ? can ? configure ? and ? optimize ? each ? control ? loop ? individually. ? unless ? otherwise ? described, ? the ? following ? functions ? are ? performed ? on ? the ? IR36021 ? on ? each ? control ? loop ? independently. ? digital ? controller ? & ? pwm ?? a ? linear ? proportional \ integral \ derivative ? (pid) ? digital ? controller ? provides ? the ? loop ? compensation ? for ? system ? regulation. ? the ? digitized ? error ? voltage ? from ? the ? high \ speed ? voltage ? error ? adc ? is ? processed ? by ? the ? digital ? compensator. ? the ? digital ? pwm ? generator ? uses ? the ? outputs ? of ? the ? pid ? and ? the ? phase ? current ? balance ? control ? signals ? to ? determine ? the ? pulse ? width ? for ? each ? phase ? on ? each ? loop. ? the ? pwm ? generator ? has ? enough ? resolution ? to ? ensure ? that ? there ? are ? no ? limit ? cycles. ? the ? compensator ? coefficients ? are ? user ? configurable ? to ? enable ? optimized ? system ? response. ?? the ? compensation ? algorithm ? uses ? a ? pid ? with ? two ? additional ? programmable ? poles. ? this ? provides ? the ? digital ? equivalent ? of ? a ? type ? iii ? analog ? compensator. ? adaptive ? transient ? algorithm ? (ata) ? dynamic ? load ? step \ up ? and ? load ? step \ down ? transients ? require ? fast ? system ? response ? to ? maintain ? the ? output ? voltage ? within ? specification ? limits. ? this ? is ? achieved ? by ? a ? unique ? adaptive ? non \ linear ? digital ? transient ? control ? loop ? based ? on ? a ? proprietary ? algorithm. ?? multiple ? time ? programming ? memory ? the ? multiple ? time ? programming ? memory ? (mtp) ? stores ? the ? device ? configuration. ? at ? power \ up, ? mtp ? contents ? are ? transferred ? to ? operating ? registers ? for ? access ? during ? device ? operation. ? mtp ? allows ? customization ? during ? both ? design ? and ? high \ volume ? manufacturing. ? mtp ? integrity ? is ? verified ? by ? cyclic ? redundancy ? code ? (crc) ? checking ? on ? each ? power ? up. ? the ? controller ? will ? not ? start ? in ? the ? event ? of ? a ? crc ? error. ?? the ? IR36021 ? offers ? up ? to ? 9 ? writes ? to ? configure ? basic ?? device ? parameters ? such ? as ? frequency ? fault ? operating ? characteristics, ? and ? boot ? voltage. ? this ? represents ? a ? significant ? size ? and ? component ? saving ? compared ? to ? traditional ? analog ? methods. ? the ? following ? pseudo \ code ? illustrates ? how ? to ? write ? the ? mtp: ? # ? write ? data ? set ? mtp ? command ? register ? = ? write, ?? line ? pointer ? = ? an ? unused ? line ? poll ? mtp ? command ? register ? until ? operation ? = ? idle. ? # ? verify ? data ? was ? written ? correctly ? issue ? a ? read ? command; ? then ? poll ? otp ? operation ? register ?? till ? operation ? = ? idle ?? verify ? that ? the ? read ? succeeded ? internal ? oscillator ? the ? IR36021 ? has ? a ? single ? 96mhz ? internal ? oscillator ? that ? generates ? all ? the ? internal ? system ? clock ? frequencies ? required ? for ? proper ? device ? function. ? the ? single ? internal ? oscillator ? is ? also ? used ? to ? set ? the ? switching ? frequency ? on ? each ? loop. ? the ? switching ? frequency ? for ? the ? two ? loops ? can ? be ? set ? to ? different ? values ? independently. ? therefore, ? the ? two ? channels ? switch ? asynchronously. ? high \ precision ? voltage ? reference ?? the ? internal ? high \ precision ? voltage ? reference ? supplies ? the ? required ? reference ? voltages ? to ? the ? dacs, ? adcs ? and ? other ? analog ? circuits. ? this ? factory ? trimmed ? reference ? is ? guaranteed ? over ? temperature ? and ? manufacturing ? variations. ?? high ? precision ? current ? reference ? an ? on \ chip ? precision ? current ? reference ? is ? derived ? using ?? an ? off \ chip ? precision ? resistor ? connected ? to ? the ? rres ? pin ? of ? the ? IR36021. ? rres ? must ? be ? a ? 7.5k , ? 1% ? tolerance ? resistor, ? placed ? very ? close ? to ? the ? controller ? pin ? to ? minimize ? parasitics. ?? voltage ? sense ?? an ? error ? voltage ? is ? generated ? from ? the ? difference ? between ? the ? target ? voltage ? and ? load \ line ? (if ? implemented), ? and ? the ? differential, ? remotely ? sensed, ? output ? voltage. ? for ? each ? loop, ? the ? error ? voltage ? is ? digitized ? by ? a ? high \ speed, ? high \ pwm1 pwm2
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 15 precision ? adc. ? an ? anti \ alias ? filter ? provides ? the ? necessary ? high ? frequency ? noise ? rejection. ? the ? gain ? and ? offset ? of ? the ? voltage ? sense ? circuitry ? for ? each ? loop ? is ? factory ? trimmed ? to ? deliver ? the ? required ? accuracy. ? current ? sense ? lossless ? inductor ? dcr ? or ? precision ? resistor ? current ? sensing ? is ? used ? to ? accurately ? measure ? individual ? phase ? currents. ? using ? a ? simple ? off \ chip ? thermistor, ? resistor ? and ? capacitor ? network ? for ? each ? loop, ? a ? thermally ? compensated ? loadline ? is ? generated ? to ? meet ? the ? given ? power ? system ? requirement. ? a ? filtered ? voltage, ? which ? is ? a ? function ? of ? the ? total ? load ? current ? and ? the ? target ? loadline ? resistance, ? is ? summed ? into ? each ? voltage ? sense ? path ? to ? accomplish ? the ? active ? voltage ? positioning ? (avp) ? function. ? mosfet ? driver ? and ? drmos ? compatibility ? the ? output ? pwm ? signals ? of ? the ? IR36021 ? are ? designed ? for ? compatibility ? with ? the ? chl85xx ? family ? of ? active ? tri \ level ? (atl) ? mosfet ? drivers. ? chl85xx ? drivers ? have ? a ? fast ? disable ? capability ? which ? enables ? any ? phase ? to ? be ? turned ? off ?? on \ the \ fly. ? it ? supports ? power \ saving ? control ? modes, ? improved ? transient ? response, ? and ? superior ? on ? the ? fly ? phase ? dropping ? without ? having ? to ? route ? multiple ? output ? disable ? (odb ? or ? smod) ? signals. ? in ? addition, ? the ? IR36021 ? provides ? the ? flexibility ? to ? configure ? pwm ? levels ? to ? operate ? with ? external ? mosfet ? drivers ? or ? driver \ mosfet ? (drmos) ? devices ? that ? support ? industry ? standard ? +3.3v ? tri \ state ? signaling. ?? i2c ? & ? pmbus ? interface ?? an ? i2c ? or ? pmbus ? interface ? is ? used ? to ? communicate ? with ? the ? IR36021. ? this ? two \ wire ? serial ? interface ? consists ? of ? clock ?? and ? data ? signals ? and ? operates ? as ? fast ? as ? 1mhz. ? the ? bus ? provides ? read ? and ? write ? access ? to ? the ? internal ? registers ? for ? configuration ? and ? monitoring ? of ? operating ? parameters ? and ? can ? also ? be ? used ? to ? program ? on \ chip ? non \ volatile ? memory ? (mtp) ? to ? store ? operating ? parameters. ? to ? ensure ? operation ? with ? multiple ? devices ? on ? the ? bus, ? an ? exclusive ? address ? for ? the ? IR36021 ? is ? programmed ? into ? mtp. ? the ? IR36021, ? additionally, ? supports ? pin \ programming ? of ? the ? address. ? to ? protect ? customer ? configuration ? and ? information, ?? the ? i2c ? interface ? can ? be ? completely ? locked ? to ? provide ? no ? access ? or ? configured ? for ? limited ? access ? with ? a ? 16 \ bit ? software ? password. ? limited ? access ? includes ? both ? write ? and ? read ? protection ? options. ? in ? addition, ? there ? is ? a ? telemetry ? only ? mode ? which ? allows ? reads ? from ? the ? telemetry ? registers ? only. ?? the ? IR36021 ? provides ? a ? hardware ? pin ? security ? option ? to ? provide ? extra ? protection. ? the ? protect ? pin ? is ? shared ? with ? the ? addr_prot ? pin ? and ? is ? automatically ? engaged ? once ? the ? address ? is ? read. ? the ? pin ? must ? be ? driven ? high ? to ? disable ? protection. ? the ? pin ? can ? be ? enabled ? or ? disabled ? by ? a ? configuration ? setting ? in ? mtp. ? the ? IR36021 ? supports ? the ? packet ? error ? checking ? (pec) ? protocol ? and ? a ? number ? of ? pmbus ? commands ? to ? monitor ? voltages ? and ? currents. ? refer ? to ? the ? pmbus ? command ? codes ? section ? on ? page ? 37. ? ir ? digital ? power ? design ? center ? (dpdc) ? gui ? the ? ir ? dpdc ? gui ? provides ? the ? designer ? with ? a ? comprehensive ? design ? environment ? that ? includes ?? screens ? to ? calculate ? vr ? efficiency ? and ? dc ? error ? budget, ? design ? the ? thermal ? compensation ? networks ? and ? feedback ? loops, ? and ? produce ? calculated ? bode ? plots ? and ? output ? impedance ? plots. ? the ? dpdc ? environment ? is ? a ? key ? utility ? for ? design ? optimization, ? debug, ? and ? validation ? of ? designs ? that ? save ? designer ? significant ? time, ? allowing ? faster ? time \ to \ market ? (ttm). ? the ? dpdc ? also ? allows ? real \ time ? design ? optimization ? and ? real \ time ? monitoring ? of ? key ? parameters ? such ? as ? output ? current ? and ? power, ? input ? current ? and ? power, ? efficiency, ? phase ? currents, ? temperature, ? and ? faults. ? the ? ir ? dpdc ? gui ? allows ? access ? to ? the ? system ? configuration ? settings ? for ? switching ? frequency, ? mosfet ? driver ? compatibility, ? soft ? start ? rate, ? automatic ? power ? state ? and ? diode ? emulation, ? loop ? compensation, ? transient ? control ? system ? parameters, ? input ? under \ voltage, ? output ? over \ voltage, ? output ? under \ voltage, ? output ? over \ current ? and ? over \ temperature. ? programming ? once ? a ? design ? is ? complete, ? the ? dpdc ? produces ? a ? complete ? configuration ? file. ? the ? configuration ? file ? can ? be ? re \ coded ? into ? an ? i2c/pmbus ? master ? (e.g. ? a ? test ? system) ? and ? loaded ? into ? the ? IR36021 ? using ? the ? bus ? protocols ? described ? on ? page ? 35. ? the ? IR36021 ? has ? a ? special ? in \ circuit ? programming ? mode ? that ? allows ? the ? mtp ? to ? be ? loaded ? at ? board ? test ? in ? mass ? production ? without ? powering ? on ? the ? entire ? board. ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 16 real \ time ? monitoring ? the ? IR36021 ? can ? be ? accessed ? through ? the ? use ? of ? pmbus ? command ? codes ? (described ? on ? page ? 37) ? to ? read ? the ? real ? time ? status ? of ? the ? vr ? system ? including ? input ? voltage, ? output ? voltage, ? input ? and ? output ? current, ? input ? and ? output ? power, ? efficiency, ? and ? temperature. ? ? theory ? of ? operation ? ? device ? power \ on ? and ? initialization ? the ? IR36021 ? is ? powered ? from ? a ? 3.3v ? dc ? supply. ? figure ? 8 ? shows ? the ? timing ? diagram ? during ? device ? initialization. ?? an ? internal ? ldo ? generates ? a ? 1.8v ? rail ? to ? power ? the ? control ? logic ? within ? the ? device. ? during ? initial ? startup, ? the ? 1.8v ? rail ? follows ? the ? rising ? 3.3v ? supply ? voltage, ? proportional ? to ? an ? internal ? resistor ? tree. ? the ? internal ? oscillator ? becomes ? active ? at ? t 1 ? as ? the ? 1.8v ? rail ? is ? ramping ? up. ? until ? soft \ start ? begins, ? the ? IR36021 ? pwm ? outputs ? are ? disabled ? in ? a ? high ? impedance ? state ? to ? ensure ? that ? the ? system ? comes ? up ? in ?? a ? known ? state. ?? the ? controller ? comes ? out ? of ? power \ on ? reset ? (por) ? at ? t 2 ? when ? the ? 3.3v ? supply ? is ? high ? enough ? for ? the ? internal ? bias ? central ? to ? generate ? 1.8v. ? at ? this ? time, ? if ? enabled ? in ? mtp ? and ? when ? the ? vinsen ? voltage ? is ? valid, ? the ? controller ? will ? detect ? the ? populated ? phases ? by ? sensing ? the ? voltage ? on ? the ? pwm ? pins. ? if ? the ? voltage ? is ? less ? than ? the ? auto ? phase ? detect ? threshold ? (unused ? pwms ? are ? grounded), ? the ? controller ? assumes ? the ? phase ? is ? unpopulated. ? once ? the ? phase ? detection ? is ? complete ? the ? contents ? of ? the ? mtp ? are ? transferred ? to ? the ? registers ? by ? time ? t 3 ? and ? the ? automatic ? trim ? routines ? are ? complete ? by ? time ? t 4 . ? the ? register ? settings ? and ? number ? of ? phases ? define ? the ? controller ? performance ? specific ? to ? the ? vr ? configuration ?\? including ? trim ? settings, ? soft ? start ? ramp ? rate, ? boot ? voltage ? and ? pwm ? signal ? compatibility ? with ? the ? mosfet ? driver. ? once ? the ? registers ? are ? loaded ? from ? mtp, ? the ? designer ? can ? use ? i2c ? to ? re \ configure ? the ? registers ? to ? suit ? the ? specific ? vr ? design ? requirements ? if ? desired. ? test ? mode ? driving ? the ? enable ? and ? vr_hot ? pins ? low ? engages ? a ? special ? test ? mode ? in ? which ? the ? i2c ? address ? changes ? to ? 0ah. ? this ? allows ? individual ? in \ circuit ? programming ? of ? the ? controller. ? this ? is ? specifically ? useful ? in ? multi \ controller ? systems ? that ? use ? a ? single ? i2c ? bus. ? note ? that ? mtp ? will ? not ? load ? to ? the ? working ? registers ? until ? either ? enable ? or ? vr_hot ? goes ? high. ? voltage ? figure ? 8: ? controller ? startup ? and ? initialization ? supply ? voltage ?? the ? controller ? is ? powered ? by ? the ? 3.3v ? supply ? rail. ?? once ? initialization ? of ? the ? device ? is ? complete, ? steady ? and ? stable ? supply ? voltage ? rails ? and ? a ? vr ? enable ? signal ? (en) ? are ? required ? to ? set ? the ? controller ? into ? an ? active ? state. ? a ? high ? en ? signal ? is ? required ? to ? enable ? the ? pwm ? signals ? and ? begin ? the ? soft ? start ? sequence ? after ? the ? 3.3v ? and ? vin ? supply ? rails ? are ? determined ? to ? be ? within ? the ? defined ? operating ? bands. ? to ? maintain ? proper ? operation ? of ? the ? device, ? glitches ? and ? narrow ? pulses ? should ? not ? be ? applied ? to ? en ? pins. ?? the ? recommended ? decoupling ? for ? the ? 3.3v ? is ? shown ? in ? figure ? 9a. ? the ? vcc ? pins ? should ? have ? a ? 0.1f ? x7r ? type ? ceramic ? capacitors ? placed ? as ? close ? as ? possible ? to ? the ? package. ? the ? v18a ? pin ? must ? have ? a ? 4.7f, ? x5r ? type ? decoupling ? capacitor ? connected ? close ? to ? the ? package ? as ? shown ? in ? figure ? 9b. ? ? figure ? 9: ? (a) ? vcc ? 3.3v ? decoupling, ? (b) ? v18a ? decoupling ? it ? should ? be ? noted ? that ? when ? powering ? up ? the ? system ? the ? 3.3v ? supply ? for ? IR36021 ? should ? be ? up ? before ? the ? bias ? voltage ? of ? the ? power ? stages ? ramp ? up. ? likewise, ? when ? the ? system ? is ? shutdown, ? the ? bias ? voltage ? of ? the ? power ? stages ? should ? be ? disconnected ? before ? the ? 3.3v ? is ? ramped ? down ? (figure ? 10). ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 17 ? ? figure ? 10: ? correct ? sequencing ? of ? bias ? voltages ? ? the ? IR36021 ? is ? designed ? to ? accommodate ? a ? wide ? variety ?? of ? input ? power ? supplies ? and ? applications ? and ? offers ? programmability ? of ? the ? vinsen ? turn \ on/off ? voltages. ? ? t able ? 1: ? vinsen ? t urn \ on / off ? v oltage ? r ange ? threshold ? range ? turn \ on ? 4.5v ? to ? 15.9375v ? in ? 1/16v ? steps 1 ? turn \ off ? 4.5v ? to ? 15.9375v ? in ? 1/16v ? steps 1 ? 1 ? must ? not ? be ? programmed ? below ? 4.5v ? the ? supply ? voltage ? on ? the ? vinsen ? pin ? is ? compared ? against ? a ? programmable ? threshold. ? once ? the ? rising ? vinsen ? voltage ? crosses ? the ? turn \ on ? threshold, ? en ? is ? asserted ? and ? all ? pwm ? outputs ? become ? active. ? the ? vinsen ? supply ? voltage ? is ? valid ? until ? it ? declines ? below ? its ? programmed ? turn \ off ? level. ?? a ? 14:1 ? or ? 22:1 ? attenuation ? network ? is ? connected ? to ? the ? vinsen ? pin ? as ? shown ? in ? figure ? 11. ? recommended ? values ? for ? a ? 12v ? system ? are ? r vin_1 ? = ? 13k ? and ? r vin_2 ? = ? 1k , ? with ?? a ? 1% ? tolerance ? or ? better. ? recommended ? values ? for ? a ? mobile ? 7v \ 19v ? system ? are ? r vin_1 ? = ? 21k ? and ? r vin_2 ? = ? 1k . ? c vinsen ? is ? required ? to ? have ? up ? to ? a ? maximum ? value ? of ? 10nf ? and ? a ? minimum ? 1nf ? for ? noise ? suppression. ?? ? figure ? 11: ? vinsen ? resistor ? divider ? network ? ? ? ? power \ on ? sequencing ? the ? vr ? power \ on ? sequence ? is ? initiated ? when ? all ? of ? the ? following ? conditions ? are ? satisfied: ? ? IR36021 ? vcc ? (+3.3v ? rail) ? > ? vcc ? uvlo ? ? input ? voltage ? (vinsen ? rail) ? > ? vin ? uvlo ? ? enable ? is ? high ? ? vr ? has ? no ? over \ current, ? over \ voltage ? or ?? under \ voltage ? faults ? on ? either ? rail ? depending ? on ? the ? settings ? ? mtp ? transfer ? to ? configuration ? registers ? occurred ? without ? parity ? error ? when ? the ? power \ on ? sequence ? is ? initiated, ? and ? with ? vboot ? set ? to ? > ? 0v, ? both ? rails ? will ? ramp ? to ? their ? configured ? boot ? voltages ? and ? assert ? pgood1 ? and ? pgood2. ?? the ? slew ? rate ? to ? vboot ? is ? programmed ? per ? table ? 2. ? this ? table ? shows ? that ? the ? slew \ rate ? of ? vboot ? is ? either ? ? ? or ? ? ? of ? the ? fast ? rate ? shown ? in ? the ? first ? two ? columns. ? there ? is ? a ? 1/10 ? multiplier, ? which ? if ? chosen ? will ? reduce ? the ? fast ? rate ? by ? a ? factor ? of ? 10. ? this ? multiplier ? can ? be ? chosen ? by ? setting ? the ? highest ? bit ? of ? the ? register# ? 31hex ? (refer ? to ? IR36021 ? register ? map). ? on ? the ? other ? hand, when ? the ? power \ on ? sequence ? is ? initiated, ? if ? vboot= ? 0v, ? the ? vr ? will ? stay ? at ? 0v ? and ? will ? not ? soft \ start ? until ? an ? operation ? command ? (margin ? high/low) ? is ? received ? from ? the ? pmbus ? or ? the ? manual_vid ? registers ? are ? loaded ? by ? a ? non \ zero ? value ? through ? i2c ? (for ? example ? through ? gui). ? note ? that ? the ? slew \ rate ? of ? vout ? when ? margining ? or ? manual_vid ? registers ? are ? used ? is ? equal ? to ? the ? fast ? rate ? shown ? in ? table ? 2. ?? if ? a ? margining ? command ? is ? executed ? before ? en ? goes ? high, ? the ? device ? will ? startup ? and ? rise ? to ? vboot ? and ? then ? go ? to ? the ? margin ? voltage. ? when ? en1 ? and ? en2 ? are ? both ? active, ? each ? loop ? starts ? when ? its ? own ? enable ? goes ? high ? provided ? that ? other ? startup ? conditions ? are ? met ? as ? mentioned ? before. ? under ? this ? condition, ? usually ? both ? loops ? start ? together ? when ? vin ? voltage ? is ? applied. ? the ? two ? loops ? can ? be ? configured ? to ? share ? a ? single ? enable ? signal ? (en1). ? under ? this ? condition ? en2 ? is ? configured ? to ? be ? ?don?t ? care?. ? this ? mode ? of ? operation ? is ? useful ? when ? sequencing ? is ? required. ? for ? example, ? one ? of ? the ? loops ? can ? be ? configured ? to ? follow ? the ? other ? loop ? with ? a ? delay ? at ? startup ? (figure ? 12) ? or ? both ? loops ? can ? be ? configured ? to ? start ? simultaneously ? with ? a ? programmable ? delay ? from ? en1 ? going ? high ? (figure ? 13). ? the ? different ? options ? for ? delay ? are ? summarized ? in ? table ? 3. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 18 t able ? 2: ? s lew ? r ates ? mv/s ? fast ? rate ? ? ? multiplier ? ? ? multiplier ? 10 ? 1 ? 5.0 ? 0.5 ? 2.50 ? 0.25 ? 15 ? 1.5 ? 7.5 ? 0.75 ? 3.75 ? 0.375 ? 20 ? 2 ? 10 ? 1 ? 5.00 ? 0.5 ? 25 ? 2.5 ? 12.5 ? 1.25 ? 6.25 ? 0.625 ? ? it ? should ? be ? noted ? that ? shutting ? down ? with ? enable ? is ? always ? a ? soft ? shutdown ? meaning ? that ? vout ? is ? ramped ? down ? to ? 0v ? (figure ? 14). ? on ? the ? other ? hand, ? shutdown ? due ? to ? input ? under \ voltage ? or ? most ? of ? the ? faults ? is ? a ? hard ? shutdown ? meaning ? that ? both ? high ? side ? and ? low ? side ? fets ? are ? turned ? off ? (figure ? 15). ? ? t able ? 3: ? options ? for ? startup ? sequencing ? delay ? ( common ? en) ? delay ? [ms] ? 0 ? 0.25 ? 0.5 ? 1 ? 2.5 ? 5 ? 10 ? ? ? figure ? 12: ? enable \ based ? startup, ? loop1 ? follows ? loop2 ? with ? a ? delay ? of ? 2.5ms ? from ? pgood2 ? rising ? edge. ? ? figure ? 13: ? enable \ based ? startup, ? both ? loops ? start ? with ? a ? delay ? of ? 2.5ms ? from ? en1 ? going ? high. ? ? figure ? 14: ? enable ? based ? shutdown, ? both ? loops ? configured ? to ? follow ? en1. ? vout1 ? and ? vout2 ? are ? ramped ? down ? to ? 0v. ? ? figure ? 15: ? vin ? based ? shutdown, ? the ? high ? side ? and ? low ? side ? fets ? are ? turned ? off ? as ? soon ? as ? vin ? falls ? below ? uvlo ? threshold. ??
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 19 boot ? voltage ? the ? IR36021 ? vboot ? voltage ? is ? fully ? programmable ? in ? mtp ?? to ? the ? range ? shown ? in ? table ? 4. ?? t able ? 4: ? v boot ? r ange ? loop ? boot ? voltage ? loop ? 1 ? 0 ? to ? 1.52v ? in ? 5mv ? steps, ? 1 st ? step=250mv ? loop ? 2 ? 0 ? to ? 1.52v ? in ? 5mv ? steps, ? 1 st ? step=250mv ? ? ? i2c ? address ? a ? resistor ? connected ? from ? addr_prot ? pin ? to ? ground ? defines ? the ? ic2 ? address ? when ? vcc ? becomes ? valid. ? note ?? that ? a ? 0.01uf ? capacitor ? must ? be ? placed ? across ? the ? resistor ? ? figure ? 16: ? addr_prot ? pin ? components ? vid ? offset ?? the ? boot ? voltage ? (vboot) ? can ? be ? offset ? according ? to ? table ? 5. ? this ? extends ? the ? range ? of ? the ? vboot ? voltage ? a ? little ? and ? is ? useful ? when ? voltages ? a ? little ? above ? 1.52v ? or ? a ? little ? below ? 250mv ? is ? required. ? the ? offset ? is ? stored ? in ? register ? #26hex ? and ? can ? be ? stored ? in ? mtp ? memory ? (for ? more ? information, ? refer ? to ? the ? register \ map ? of ? the ? device). ? this ? offset ? is ? effective ? when ? the ? output ? voltage ? is ? controlled ? by ? the ? manual_vid ? registers ? as ? well. ? however, ? when ? the ? output ? voltage ? is ? controlled ? by ? margining ? commands ? this ? offset ? is ? not ? effective. ? note ? the ? vmax ? register ? (reg ? 3d) ? must ? be ? set ? appropriately ? to ? allow ? the ? required ? output ? voltage ? offset. ? ? phasing ? the ? number ? of ? phases ? enabled ? on ? each ? loop ? of ? the ? IR36021 ? is ? shown ? in ? table ? 6. ? when ? operated ? in ? 2 \ phase ? mode, ? the ? two ? phases ? of ? loop1 ? are ? 180 ? degrees ? out ? of ? phase. ? this ? increases ? the ? effective ? ripple ? frequency ? and ? reduces ? the ? required ? output ? and ? input ? filter ? capacitances. ? ? ? t able ? 5: ? vid ? o ffset ? parameter ? memory ? range ? step ? size ? output ? voltage ? r/w ? \ 35mv ? to ? +40mv ? 5mv ? ? t able ? 6: ? l oop ? c onfiguration ? configuration ? loop1 ? loop2 ? 2+0 ? 2 \ phases ? \? 1+0 ? 1 \ phase ?\? 2+1 ? 2 \ phases ? 1 \ phase ? 1+1 ? 1 \ phase ? 1 \ phase ? ? unused ? phases ? based ? upon ? the ? configuration ? shown ? in ? table ? 28 ? unused ? phases ? are ? disabled. ? note ? that ? when ? loop1 ? operates ? in ? single \ phase ? mode, ? pwm1b ? is ? disabled. ? disabled ? pwm ? outputs ? should ? be ? left ? floating ? unless ? the ? ?populated ? phase ? detection? ? feature ? is ? used. ? if ? so, ? the ? unused ? pwm ? outputs ? should ? be ? grounded. ? the ? reason ? is ? that ? IR36021 ? detects ? the ? number ? of ? populated ? phases ? at ? start \ up ? by ? comparing ? the ? voltage ? on ? the ? pwm ? pin ? against ? the ? phase ? detection ? threshold. ? it ? is ? easier ? and ? recommended ? to ? disable ? the ? ?populated ? phase ? detection? ? feature ? at ? startup. ? ? switching ? frequency ? the ? phase ? switching ? frequency ? (fsw) ? of ? the ? IR36021 ? is ? set ? by ? a ? user ? configurable ? register ? independently ? for ? each ? loop. ? the ? IR36021 ? provides ? fine ? granularity ? as ? shown ? in ? figure ? 17. ? the ? IR36021 ? oscillator ? is ? factory ? trimmed ? to ? guarantee ? accuracy. ? ? figure ? 17: ? switching ? frequency ? resolution ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 20 mosfet ? driver ? and ? powirstage ? selection ? the ? pwm ? signals ? from ? the ? active ? phases ? of ? the ? IR36021 ?? are ? designed ? to ? operate ? industry ? standard ? tri \ state ? type ? drivers ? or ? powirstage ? ? devices. ? the ? logic ? operation ? for ? the ? tri \ state ? drivers ? is ? depicted ? in ? figures ? 18. ? note ? that ? the ? pwm ? outputs ? are ? tri \ stated ? whenever ? the ? controller ? is ? disabled ? (en ? = ? low), ? the ? shut \ down ? ramp ? has ? completed ? or ? before ? the ? soft \ start ? ramp ? is ? initiated. ? ? figure ? 18: ? 3.3v ? tri \ state ? driver ? logic ? levels ? output ? voltage ? differential ? sensing ? the ? IR36021 ? vcpu ? and ? vrtn ? pins ? for ? each ? loop ? are ? connected ? to ? the ? load ? sense ? pins ? of ? each ? output ? voltage ? to ? provide ? true ? differential ? remote ? voltage ? sensing ? with ? high ? common \ mode ? rejection. ? each ? loop ? has ? a ? high ? bandwidth ? error ? amplifier ? that ? generates ? the ? error ? voltage ? between ? this ? remote ? sense ? voltage ? and ? the ? target ? voltage. ? the ? error ? voltage ? is ? digitized ? by ? a ? fast, ? high \ precision ? adc. ?? as ? shown ? in ? figure ? 19, ? the ? vsen ? and ? vrtn ? inputs ? have ? a ? 2k ?? pull \ up ? to ? an ? internal ? 1v ? rail. ? this ? causes ? some ? current ? flow ? in ? the ? vsen ? and ? vrtn ? lines ? so ? external ? impedance ? should ? be ? kept ? to ? a ? minimum ? to ? avoid ? creating ? an ? offset ?? in ? the ? sensed ? output ? voltage. ? ? figure ? 19: ? output ? voltage ? sensing ? impedance ? current ? sensing ?? the ? IR36021 ? provides ? per ? phase ? current ? sensing ? to ? support ? accurate ? adaptive ? voltage ? positioning ? (avp), ? current ? balancing, ? and ? over \ current ? protection. ? the ? differential ? current ? sense ? scheme ? supports ? both ? lossless ? inductor ? dcr ? and ? per ? phase ? precision ? resistor ? current ? sensing ? techniques. ? for ? dcr ? sensing, ? a ? suitable ? resistor \ capacitor ? network ? of ? r sen ? and ? c sen ? is ? connected ? across ? the ? inductor ? in ? each ? phase ? as ? shown ? in ? figure ? 20. ? the ? time ? constant ? of ? this ? rc ? network ? is ? set ? to ? equal ? the ? inductor ? time ? constant ? (l/dcr) ? such ? that ? the ? voltage ? across ? the ? capacitor ? c sen ? is ? equal ? to ? the ? voltage ? across ? the ? inductor ? dcr. ? l_out dcr r_isen r_irtn rsen csen irtn isen v out + - i i phase ? figure ? 20: ? dcr ? current ? sensing ? a ? current ? proportional ? to ? the ? inductor ? current ? in ? each ? phase ? is ? generated ? and ? used ? for ? per ? phase ? current ? balancing. ? the ? individual ? phase ? current ? signals ? are ? summed ? to ? arrive ? at ? the ? total ? current. ? the ? phase ? currents ? and ? total ? current ? are ? quantized ? by ?? the ? monitor ? adc ? and ? used ? to ? implement ? the ? current ? monitoring ? and ? ocp ? features. ? the ? total ? current ? is ? also ? summed ? with ? the ? output ? the ? output ? voltage ? dac ? (vid ? dac) ? to ? implement ? the ? avp ? function ? (load \ line ? function). ?? the ? recommended ? value ? for ? c sen ? is ? a ? 100nf ? npo ? type ? capacitor. ? to ? prevent ? undershooting ? of ? the ? output ? voltage ? during ? load ? transients, ? the ? r sen ? resistor ? can ? be ? calculated ? by: ? dcr c out l r sen sen ? ? _ * 05 . 1 ? identical ? resistors ? (r_isen ? and ? r_irtn) ? are ? connected ? to ? the ? isen ? and ? irtn ? pins ? of ? each ? phase ? for ? the ? best ? common ? mode ? rejection. ? the ? required ? value ? is: ? r_isen, ? r_irtn ? = ? 301 , ? 1% ? resistor ? these ? components ? must ? be ? placed ? close ? to ? the ? IR36021 ? pins. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 21 current ? balancing ? & ? offset ? the ? IR36021 ? provides ? accurate ? digital ? phase ? current ? balancing ? for ? loop1 ? when ? it ? is ? configured ? to ? operate ? in ?? 2 \ phase ? mode. ? current ? balancing ? equalizes ? the ? current ? across ? the ? two ? phases. ? this ? improves ? efficiency, ? prevents ? hotspots ? and ? reduces ? the ? possibility ? of ? inductor ? saturation. ? the ? sensed ? currents ? for ? each ? phase ? are ? converted ? to ? a ? voltage ? and ? are ? multiplexed ? into ? the ? monitor ? adc. ?? the ? digitized ? currents ? are ? low \ pass ? filtered ? and ? passed ? through ? a ? proprietary ? current ? balance ? algorithm ? to ? enable ? the ? equalization ? of ? the ? current ? in ? two ? phases. ?? figure ? 21 ? shows ? that ? due ? to ? component ? and ? layout ? mismatches ? and ? other ? offsets ? in ? the ? control ? and ? measurement ? circuits, ? the ? reported ? current ? values ? in ? the ? gui ? are ? a ? little ? different ? for ? the ? two ? phases ? (loop1) ? when ? current ? balancing ? is ? disabled. ? figure ? 22 ? shows ? that ? when ? current ? balancing ? is ? enabled ? the ? current ? in ? two ? phases ? become ? almost ? equal. ?? in ? addition, ? the ? IR36021 ? allows ? the ? user ? to ? offset ? phase ? currents ? to ? optimize ? the ? thermal ? solution. ? figure ? 23 ? shows ? that ? phase ? 1 ? current ? has ? been ? programmed ? to ? have ? approximately ? 30% ? more ? current ? than ? the ? other ? phase. ? 30% ? is ? the ? maximum ? offset ? that ? can ? be ? applied ? in ? the ? system. ? for ? the ? graphs ? shown ? in ? figures ? 21, ? 22, ? and ? 23 ? the ? load ? current ? has ? been ? measured ? by ? a ? multi \ meter ? whereas ? the ? phase ? currents ? are ? the ? values ? reported ? in ? the ? gui. ?? in ? addition ? to ? the ? low ? speed ? phase ? balancing, ? mentioned ? above, ? there ? is ? a ? proprietary ? high \ speed ? active ? phase ? current ? balancing ? (hspb) ? which ? operates ? during ? load ? transients. ? hsbp?s ? purpose ? is ? to ? eliminate ? current ? imbalance ? that ? can ? result ? from ? a ? load ? current ? oscillating ? near ? the ? switching ? frequency. ? the ? phase ? pulse ? widths ? are ? compared ? and ? the ? largest ? pulse ? is ? skipped ? if ? its ? pulse ? width ? exceeds ? an ? internally ? set ? threshold ? relative ? to ? the ? smallest ? phase. ? this ? ensures ? that ? the ? phases ? remain ? balanced ? during ? high ? frequency ? load ? transients. ? high ? speed ? phase ? balancing ? (hspb) ? and ? regular ? (low \ speed) ? phase ? balancing ? can ? be ? activated/disabled ? independently. ? phase balancing disabled 0 5 10 15 20 25 30 35 10 20 30 40 50 60 iload [a] phase current [a] p1 p2 figure ? 21: ? phase ? currents ? for ? a ? tested ? sample ? when ? phase ? balancing ? is ? disabled. ? the ? current ? in ? phase ? 2 ? is ? a ? little ? more ? than ? phase ? 1. ? the ? currents ? values ? are ? the ? reported ? gui ? values. ? phase balancing enabled 0 5 10 15 20 25 30 35 10 20 30 40 50 60 iload [a] phase current [a] p1 p2 figure ? 22: ? phase ? currents ? measured ? when ? phase \ balancing ? is ? activated ? for ? the ? same ? tested ? sample ? used ? for ? figure ? 21 ? . ? the ? currents ? in ? two ? phases ? are ? almost ? equal. ? phase balancing enabled, p1 30% more current 0 5 10 15 20 25 30 35 10 20 30 40 50 60 iload [a] phase current [a] p1 p2 a ? figure ? 23: ? phase ? currents ? measured ? when ? phase \ balancing ? is ? activated ? and ? the ? current ? in ? phase ? 1 ? is ? programmed ? to ? be ? about ? 30% ? more ? than ? the ? current ? in ? phase ? 2 ? (same ? tested ? sample). ? current ? calibration ? for ? optimizing ? the ? current ? measurement ? accuracy ? of ? a ? design ? or ? even ? individual ? boards, ? the ? IR36021 ? contains ? a ? register ? in ? mtp ? which ? can ? store ? a ? user \ programmed ?? total ? current ? offset ? to ? zero ? the ? no \ load ? current ? reading. ? refer ? to ? table ? 27 ? for ? output ? current ? calibration ? registers. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 22 load ? line ? the ? IR36021 ? enables ? the ? implementation ? of ? accurate, ? temperature ? compensated ? load ? lines ? on ? both ? loops. ?? the ? load ? line ? is ? set ? by ? an ? external ? resistor ? r cs , ? as ? shown ?? in ? figure ? 24 ? and ? the ? nominal ? value ? must ? also ? be ? stored ?? in ? mtp. ? the ? stored ? load ? line, ? scaling ? and ? gain ? values ? provides ? the ? IR36021 ? with ? the ? scaling ? factor ? for ? the ? digital ? computation ? of ? the ? total ? current ? to ? determine ? the ? ocp ? threshold ? and ? i2c ? current ? and ? output ? voltage ? reporting. ? the ? load ? line ? ranges ? for ? IR36021 ? are ? shown ? in ? table ? 7. ? t able ? 7: ? l oad ? l ine ? s ettings ? ? loop ? #1 ? loop ? #2 ? minimum ? 0.0 ? m ? 0.0 ? m ? maximum ? 6.375 ? m ? 12.75 ? m ? resolution ? 0.025 ? m ? 0.050 ? m ? ? figure ? 24 ? shows ? a ? typical ? 1.3m ? loadline ? measurement ? with ? minimum ? and ? maximum ? error ? ranges. ? the ? controller ? accuracy ? lies ? well ? within ? common ? processor ? requirements. ? for ? each ? loop, ? the ? sensed ? current ? from ? all ? the ? active ? phases ? is ? summed ? and ? applied ? to ? a ? resistor ? network ? across ? the ? rscp ? and ? rcsm ? pins. ? this ? generates ? a ? precise ? proportional ? voltage ? which ? is ? summed ? with ? the ? sensed ? output ? voltage ? and ? vid ? dac ? reference ? to ? form ? the ? error ? voltage. ? also ? part ? of ? the ? network ? shown ? in ? figure ? 32 ?? is ? thermistor, ? r th . ? for ? proper ? loadline ? temperature ? compensation, ? the ? thermistor ? is ? placed ? near ? the ? phase ? one ? inductor ? to ? accurately ? sense ? the ? inductor ? temperature. ? ? figure ? 24: ? load ? line ? & ? thermal ? compensation ? the ? resistor ? r cs ? is ? calculated ? using ? the ? following ? procedure: ? first ? the ? designer ? calculates ? the ? r cseffective ? or ? the ? total ? effective ? parallel ? resistance ? across ? the ? rscp ? and ? rcsm ? pins. ? it ? is ? defined ? by: ? dcr r isen r r ll effective cs ? ? ? _ 8 ? where ? r ll ? is ? the ? desired ? loadline, ? typically ? 1.0m , ?? dcr ? is ? dc ? resistance ? of ? the ? phase ? inductor, ? and ? r_isen ?? is ? the ? series ? resistor ? across ? the ? inductor ? sense ? circuit. ?? the ? required ? value ? for ? r_isen ? is ? a ? 301 , ? 1% ? tolerance. ?? then ? the ? designer ? chooses ? a ? suitable ? ntc ? thermistor. ? thermistor ? r th ? is ? typically ? selected ? to ? have ? the ? lowest ? thermal ? coefficient ? and ? tightest ? tolerance ? in ? a ? standard ? available ? package. ? a ? typical ? value ? for ? the ? ntc ? will ? be ? 10k , ? 1% ? tolerance. ? recommended ? thermistors ? are ? shown ? in ? table ? 8. ? t able ? 8: ? 10k ? 1% ? ntc ? t hermistors ? murata ? ncp18xh103f03rb ? panasonic ? ertj1vg103fa ? tdk ? ntcg163jf103f ? ? then ? the ? designer ? calculates ? r cs ? using ? the ? following ? equation: ? th series effective cs cs r 1 r 2 r 1 1 r ? ? ? ? . ? r series ? is ? selected ? to ? achieve ? minimum ? loadline ? error ? over ? temperature. ? the ? ir ? dpdc ? (gui) ? provides ? a ? graphical ? tool ? that ? allows ? the ? user ? to ? easily ? calculate ? the ? resistor ? values ? for ? minimum ? error. ?? the ? capacitor ? c cs ? is ? defined ? by ? the ? following ? equation: ? avp cs f ve rcseffecti c ? ? ? ? ? 2 1 ? where, ? f avp ? is ? the ? user ? selectable ? current ? sense ? avp ? bandwidth. ? the ? best ? bandwidth ? is ? typically ? in ? the ? range ?? of ? 200khz ? to ? 300khz. ? setting ? 0m ?? loadline ? the ? load ? line ? is ? turned ? off ? by ? setting ? a ? digital ? bit ? in ? the ? IR36021 ? register ? map. ? this ? is ? a ? separate ? bit ? from ? the ? load ? line ? settings ? for ? each ? loop. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 23 even ? though ? the ? loadline ? is ? disabled ? digitally, ? the ? resistors ? and ? loadline ? and ? scaling ? registers ? should ? be ? set ? such ? that ? the ? load ? line ? is ? at ? least ? 3 ? times ? the ? value ? of ? low ? ohmic ? dcr ? inductors ? (<0.5m ? ) ? or ? 1 ? times ? the ? dcr ? value ? for ? high ? ohmic ? inductors ? (>0.5m ? ), ? e.g. ? if ? the ? inductor(s) ? dcr ? is ? 0.3m ? , ? a ? notional ? 0.9 ? m ?? load ? line ? should ? be ? set. ? for ? accurate ? current ? measurement ? and ? ocp ? threshold ? with ? the ? loadline ? disabled, ? the ? output ? current ? gain ? and ? scaling ? registers ? must ? be ? set ? to ? the ? same ? value ? as ? the ? loadline ? set ? with ? the ? external ? resistor ? network. ? with ? loadline ? disabled, ? the ? thermistor ? and ? css ? capacitor ? must ? still ? be ? installed ? to ? insure ? accuracy ? of ? the ? current ? measurement. ? digital ? feedback ? loop ? & ? pwm ? the ? IR36021 ? uses ? a ? digital ? feedback ? loop ? to ? minimize ? the ? requirement ? for ? output ? decoupling ? and ? maintain ? a ? tightly ? regulated ? output ? voltage. ? the ? error ? between ? the ? target ? and ? the ? output ? voltage ? is ? digitized. ? this ? error ? voltage ? is ? then ? passed ? through ? a ? low ? pass ? filter ? to ? smooth ? ripple ?? and ? then ? passed ? through ? a ? pid ? (proportional ? integral ? derivative) ? compensator ? followed ? by ? an ? additional ? single ? pole ? filter. ? the ? loop ? compensation ? parameters ? k p ? (proportional ? coefficient), ? k i ? (integral ? coefficient), ? and ? k d ? (derivative ? coefficient) ? and ? low \ pass ? filter ? pole ? locations ? are ? user ? configurable ? to ? optimize ? the ? vr ? design ? for ? the ? chosen ? external ? components. ? the ? IR36021 ? significantly ? reduces ? design ? time ? because ?? the ? loop ? coefficients ? need ? to ? be ? calculated ? only ? once. ? simply ? enable ? any ? number ? of ? phases ? (1 ? or ? 2 ? for ? loop1) ? and ? design ? the ? compensation ? coefficients. ? the ? IR36021 ? will ? intelligently ? scale ? the ? coefficients ? and ? low \ pass ? filters ? automatically ? as ? one ? phase ? is ? dynamically ? added ? and ? dropped ? to ? maintain ? optimum ? stability. ? in ? other ? words, ? the ? loop \ band \ width ? does ? not ? change ? significantly ? (decreases ? a ? little) ? as ? the ? loop ? switches ? from ? 2 \ phase ? to ? 1 \ phase ? operation. ? each ? of ? the ? proportional, ? integral ? and ? derivative ? terms ? is ?? a ? 6 \ bit ? value ? stored ? in ? mtp ? that ? is ? decoded ? by ? the ? ic?s ? digital ? code. ? this ? allows ? the ? designer ? to ? set ? the ? converter ? bandwidth ? and ? phase ? margin ? to ? the ? desired ? values. ? the ? compensator ? transfer ? function ? is ? defined ? as ?? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 2 1 1 1 1 1 ) ( p s p s s kd s ki kp ? ? ? where ? p 1 ? and ? p 2 ? are ? configurable ? poles ? typically ? positioned ? to ? filter ? noise ? and ? ripple ? and ? roll ? off ? the ? high \ frequency ? gain ? that ? the ? k d ? term ? creates. ? the ? outputs ? of ? the ? compensator ? and ? the ? phase ? current ? balance ? block ? are ? fed ? into ? a ? digital ? pwm ? pulse ? generator ? to ? generate ? the ? pwm ? pulses ? for ? the ? active ? phases. ?? the ? digital ? pwm ? generator ? has ? a ? native ? time ? resolution ?? of ? 625ps ? which ? is ? combined ? with ? digital ? dithering ? to ? provide ? an ? effective ? pwm ? resolution ? of ? 156.25ps. ?? this ? ensures ? that ? there ? is ? no ? limit ? cycling ? when ? operating ? at ? the ? highest ? switching ? frequency. ? adaptive ? transient ? algorithm ? (ata) ? the ? IR36021 ? adaptive ? transient ? algorithm ? (ata) ? is ? a ? high ? speed ? non \ linear ? control ? technique ? that ? speeds ? up ? the ? controller ? response ? to ? loading ? transients ? and ? reduces ? the ? required ? output ? bulk ? capacitance ? for ? reduced ? system ? cost. ? ata ? is ? not ? very ? effective ? for ? single \ phase ? rails ? (loop2). ? in ? addition, ? it ? is ? more ? effective ? when ? used ? in ? conjunction ? with ? the ? load \ line. ? a ? high \ speed ? digitizer ? measures ? both ? the ? magnitude ? and ? slope ? of ? the ? error ? signal ? to ? predict ? the ? load ? current ? transient. ? if ? the ? magnitude ? and ? slope ? of ? the ? error ? signal ? exceed ? predefined ? thresholds, ? the ? ata ? is ? activated. ? when ? activated, ? the ? ata ? bypasses ? the ? pid ? control ? momentarily ? during ? load ? transients ? to ? achieve ? very ? wideband ? closed ? loop ? control ? and ? smoothly ? transitions ? back ? to ? pid ? control ? during ? steady ? state ? load ? conditions. ? during ? ata ? operation, ? the ? width ? of ? the ? pwm ? pulses ? is ? not ? changed. ? however, ? the ? positions ? of ? the ? pulses ? are ? changed. ? for ? example, ? in ? a ? loading ? transient ? when ? ata ? is ? activated, ? the ? pwm ? pulses ? come ? closer ? in ? all ? active ? phases ? to ? compensate ? for ? the ? undershoot ? caused ? by ? the ? transient. ??? figure ? 25 ? illustrates ? the ? transient ? performance ? improvement ? provided ? by ? the ? ata ? showing ? the ? clear ? reduction ? in ? undershoot ? and ? overshoot ? and ? recovery ? time. ? figure ? 26 ? is ? a ? close ? up ? of ? a ? loadstep ? illustrating ? the ? fast ? reaction ? time ? of ? ata ? and ? how ? the ? algorithm ? changes ? the ? pulse ? phase ? relationships. ? ata ? settings/thresholds ? can ? be ? modified ? in ? the ? gui. ? in ? addition, ? it ? can ? be ? disabled ? if ? desired. ? the ? ata ? settings ? are ? stored ? in ? mtp ? memory. ? during ? a ? load ? transient ? overshoot, ? the ? ata ? can ? also ? be ? programmed ? to ? turn ? off ? the ? low \ side ? mosfets ? instead ? of ? holding ? them ? on. ? this ? forces ? the ? load ? current ? to ? flow ? through ? the ? larger ? forward ? voltage ? of ? the ? fet ? body ? diode ? and ? helps ? to ? reduce ? the ? overshoot ? created ? during ? a ? load ? release ? (figure ? 27). ? this ? is ? not ? recommended ? when ? there ? is ? no ? load \ line ? and ? there ? is ? no ? steady ? state ? load. ? this ? is ? because ? unloading ? creates ? a ? vout ? overshoot ? and ? without ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 24 load ? (and ? with ? low \ side ? mosfets ? being ? off) ? it ? can ? take ? a ? relatively ? long ? time ? for ? the ? output ? voltage ? to ? decay ? down ? to ? the ? steady ? state ? value. ?? note ? that ? ata ? is ? more ? effective ? on ? multi \ phase ? rails ? (e.g. ? loop1) ? and ? when ? used ? in ? conjunction ? with ? the ? load \ line. ? ? figure ? 25: ? vout1 ? (2phase) ? response ? to ? a ? transient. ? ata ? enable/disable ? comparison, ? load \ line ? is ? enabled. ? ? figure ? 26: ? ata ? close ? up ? when ? a ? load ? is ? applied. ? dynamic ? vid ? slew ? rate ? vid ? refers ? to ? the ? code ? inside ? a ? register ? which ? corresponds ? to ? a ? specific ? output ? voltage. ? this ? code ? can ? be ? changed ? in ? the ? gui ? by ? changing ? the ? manual_vid ? registers ? (through ? i2c ? communication) ? or ? by ? corresponding ? commands ? (for ? example ? margining ? commands) ? sent ? through ? pmbus. ? the ? IR36021 ? provides ? the ? vr ? designer ? with ? up ? to ? 8 ? slew ? rates ? by ? selecting ? a ? slew ? rate ? setting ? as ? shown ? in ? the ? fast \ rate ? column ? in ? table ? 2. ?? figure ? 27: ? diode ? emulation ? (ata ? is ? on) ? during ? a ? load ? release ? efficiency ? shaping ? IR36021 ? features ? efficiency ? shaping ? technology ? that ? enables ? vr ? designers ? to ? cost \ effectively ? maximize ? system ? efficiency. ? efficiency ? shaping ? technology ? consists ? of ? phase \ shedding ? (sometimes ? referred ? to ? as ? ?dynamic ? phase ? control?, ? dpc) ? and ? diode \ emulation ? to ? achieve ? the ? best ? vr ? efficiency ? at ? a ? given ? cost ? point. ? power \ saving ? states ? the ? IR36021 ? can ? be ? programmed ? to ? do ? phase ? shedding ? for ? loop1 ? and/or ? go ? into ? diode ? emulation ? at ? light ? load ? for ? both ? loops. ? both ? of ? these ? mechanisms ? improve ? efficiency ? at ? light ? loads ? at ? the ? expense ? of ? more ? output ? voltage ? ripple. ? phase \ shedding ? and ? diode \ emulation ? can ? be ? enabled/disabled ? independently ? from ? each ? other ? and ? independently ? for ? each ? loop. ? to ? improve ? efficiency ? for ? loop1 ? at ? light ? loads ? when ? there ? is ? no ? transient, ? it ? is ? recommended ? to ? program ? the ? device ? to ? do ? phase ? shedding ? at ? about ? 20a ? and ? as ? the ? current ? decreases ? to ? about ? 3 \ 5a ? the ? diode \ emulation ? should ? be ? activated ? for ? the ? running ? phase ? (phase \ 1a). ? this ? sequence ? can ? be ? explained ? using ? power ? states ? as ? summarized ? in ? table ? 9. ? for ? loop2, ? since ? it ? is ? 1phase, ? ps1 ? and ? ps0 ? are ? identical. ? when ? there ? are ? transients, ? it ? is ? recommended ? to ? use ? either ? phase ? shedding ? or ? diode ? emulation ? since ? using ? both ? mechanisms ? can ? further ? increase ? the ? output ? voltage ? ripple ? in ? some ? conditions. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 25 t able ? 9: ? p ower ? s tates ? ? power ? state ? mode ? recommended ? current ? ps0 ? full ? power, ? 2 (loop1) ? maximum ? ps1 ? light ? load ? 1 ? <20a ? ps2 ? light ? load, ? 1 ? with ? diode ? emulation ? <5a ? ? the ? power ? states ? may ? be ? commanded ? through ? i2c/pmbus, ? or ? the ? IR36021 ? can ? automatically ? step ? through ? the ? power ? states ? based ? upon ? the ? regulator ? conditions ? as ? summarized ? in ? table ? 10. ? auto ? mode ? is ? ensued ? when ? diode \ emulation ? is ? enabled ? by ? setting ? a ? flag. ? it ? should ? be ? noted ? that ? to ? use ? the ? commands ? (i2c/pmbus), ? auto ? mode ? should ? be ? disabled. ? furthermore, ? it ? is ? recommended ? to ? use ? the ? auto ? mode ? or ? phase \ shedding ? option ? as ? much ? as ? possible ? instead ? or ? using ? the ? commands. ? t able ? 10: ? p ower ? s tate ? e ntry /e xit ? ? auto ?? mode ? disabled ?? auto ? mode ?? ps1 ? entry ? a) ? based ? on ? current ? level ? if ? phase \ shed ? is ? enabled ?? b) ? via ? command ? c) ? based ? on ? current ? level ?? if ? commanded ? to ? ps2 ? based ? on ? the ? current ? level ? if ? phase \ shed ? is ? enabled ?? ps1 ? exit ? a) ? command ? to ? ps0 ? b) ? command ? to ? ps2 ? if ? current ? level ? is ? low ? c) ? current ? level ? to ? ps0 ?? d) ? current ? limit ? to ? ps0 ?? fe ? to ? ps0 ? if ? vout ? drops ? below ? a ? threshold ? (fc_hth) ? ? a) ? current ? level ? to ? ps0 ? b) ? current ? level ? to ? ps2 ? c) ? to ? ps0 ? if ? vout ? drops ? below ? a ? threshold ? (fc_hth) ? ps2 ? entry ? a) ? command ? (if ? current ? is ? lower ? than ? threshold) ? current ? level ? in ? phase \ 1a ? ps2 ? exit ? a) ? command ? to ? ps1 ?? b) ? command ? to ? ps0 ? c) ? current ? level ? to ? ps1 ?? d) ? current ? limit ? to ? ps0 ?? e) ? to ? ps0 ? if ? vout ? drops ? below ? a ? threshold ? (le_th) ? a) ? to ? ps0 ? if ? vout ? drops ? below ? a ? threshold ? (le_th) ? b) ? to ? ps0 ? or ? ps1 ? based ? on ? current ? ? ? ? ? ? ? phase ? shedding ? / ? dynamic ? phase ? control ? (dpc) ? the ? designer ? can ? configure ? the ? vr ? to ? dynamically ? add ? or ? shed ?? one ? phase ? as ? the ? load ? current ? varies. ? phase ? shedding ? (or ? dpc) ? reduces ? the ? number ? of ? phases ? (figures ? 28 \ 30) ? based ? upon ? monitoring ? both ? filtered ? total ? current ? and ? error ? voltage ? over ? the ? dpc ? filter ? window. ? monitoring ? the ? error ? voltage ? insures ? that ? the ? vr ? will ? not ? drop ? a ? phase ? during ? large ? load ? oscillations. ? figure ? 28 ? shows ? that ? at ? startup, ? if ? the ? load ? current ? is ? below ? the ? 2 \ phase ? current ? threshold, ? one ? phase ? is ? dropped ? shortly ? after ? pgood1 ? goes ? high. ? figure ? 28: ? phase ? shed ? 2 ? 1 ? at ? startup ? during ? a ? large ? load ? step ? for ? loop1 ? and ? based ? upon ? the ? error ? voltage, ? the ? controller ? instantly ? goes ? to ?? 2 \ phase ? operation ? and ? will ? remain ? there ? for ? the ? dpc ? filter ? delay ? (bw 40khz) ? after ? which ? a ? phase ? will ? be ? dropped ? depending ? on ? the ? load ? current ? (figure ? 29). ? the ? error \ threshold, ? which ? should ? be ? exceeded, ? is ? called ? ?l1_fc_hth?. ? this ? threshold ? is ? among ? the ? ata ? settings. ? the ? ata ? circuitry ? ensures ? that ? the ? idle ? phase ? is ? activated ? with ? optimum ? timing ? during ? a ? load ? step ? (this ? is ? still ? valid ? even ? if ? ata ? is ? disabled). ? figure ? 30 ? shows ? that ? how ? adding/dropping ? a ? phase ? is ? automatically ? done ? based ? on ? the ? current ? level. ? for ? this ? figure, ? the ? slew \ rate ? of ? the ? load ? step ? is ? not ? high ? enough ? to ? make ? a ? vout ? drop ? larger ? than ? the ? threshold. ?? therefore, ? phase ? dropping/adding ? is ? delayed ? because ? it ? is ? based ? on ? the ? measured ? load ? current ? which ? is ? low \ pass ? filtered. ??
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 26 ? figure ? 29: ? loop1 ? going ? from ? 1 ? to ? 2 ? operation ? due ? to ? a ? heavy ? load ? transient ? which ? causes ? vout ? drop, ? 1 ? operation ? is ? resumed ? with ? a ? delay ? after ? vout1 ? recoveres. ? ? figure ? 30: ? wide ? view ? of ? phase ? shed/add ? current ? limit ? and ? current ? balancing ? circuits ? remain ? active ? during ? ata ? events ? to ? prevent ? inductor ? saturation ? and ? maintain ? even ? distribution ? of ? current ? across ? the ? active ? phases. ? as ? mentioned ? before, ? loop ? coefficients ? are ? automatically ? scaled ? to ? the ? number ? of ? active ? phases ? to ? insure ? stability ? at ? all ? load ? currents. ? the ? add/drop ? points ? for ? phase \ 1b ? can ? be ? set ? in ? 2a ? increments ? from ? 0 ? to ? 30a ? with ? a ? fixed ? 4a ? hysteresis. ? setting ? the ? threshold ? to ? 0a ? will ? disable ? phase ? shedding. ? as ? shown ? in ? figure ? 31, ? with ? phase \ shedding ? enabled, ? IR36021 ? provides ? light ? and ? medium ? load ? efficiency ? improvements. ? to ? generate ? the ? graphs ? shown ? in ? figure ? 31, ? the ? inductor, ? the ? pcb ? and ? the ? controller ? loses ? have ? been ? taken ? into ? account ? in ? measurements. ? 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 0 102030405060 io [a] efficiency [% ] w ith phase-shedding w ithout phase-shedding figure ? 31: ? typical ? efficiency ? with ? phase \ shedding ? for ? loop1, ? vo1=1.2v, ? 600khz/phase, ? 2 ? x ? ir3550 ? used ? as ? power \ stages ? diode ? emulation ? / ? discontinuous ? mode ? operation ?? under ? very ? light ? loads, ? efficiency ? can ? become ? dominated ? by ? mosfet ? switching ? losses. ? in ? ps2 ? mode, ? the ? IR36021 ? operates ? as ? a ? constant ? on \ time ? controller ? where ? the ? user ? sets ? the ? desired ? peak \ to \ peak ? ripple ? by ? programming ?? an ? error ? threshold ? and ? an ? on \ time ? duration ? (table ? 11). ?? ? t able ? 11: ? ps2 ? m ode , ? c onstant ? o n \ time ? c ontrol , ? parameters ? mtp ? register ? function ? de_thresh ? sets ? the ? error ? voltage ? at ? which ? an ?? on \ time ? pulse ? is ? started ? in ? 2mv ? steps ? pulse_width_de ? sets ? the ? duration ? of ? the ? on \ time ? pulse ? in ? 40ns ? steps. ? note ? that ? this ? also ? sets ? the ? off \ time ? in ? 160ns ? steps ? off \ time_adjust ? reduces ? the ? calculated ? low \ side ? fet ?? on \ time ? in ? 60ns ? steps. ? useful ? for ? compensating ? for ? drmos ? or ? other ? drivers? ? tri \ state ? delay ? for ? a ? better ? prediction ? of ? the ? zero \ crossing ? le_th ? error ? threshold ? to ? go ? from ? ps1/ps2 ? mode ? to ? full ? phase ? count. ? 4 ? mv ? resolution. ? if ? vout ? drops ? by ? this ? amount, ? the ? control ? will ? be ? changed ? to ? full \ phase ? count ? and ? diode \ emulation ? is ? ended. ? ni_thresh ? total ? current ? threshold ? below ? which ? it ? is ? assumed ? that ? the ? inductor ? current ? has ? a ? negative ? component. ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 27 in ? ps2 ? mode ? (constant \ on \ time ? mode), ? internal ? circuitry ? determines ? when ? the ? inductor ? current ? declines ? to ? zero ? on ? a ? cycle ? by ? cycle ? basis ? and ? shuts ? off ? the ? low \ side ? mosfet ? at ? the ? appropriate ? time ? in ? each ? cycle ? (figure ? 32). ? this ? reduces ? conduction ? losses ? and ? also ? lowers ? the ? switching ? frequency ? resulting ? in ? improved ? efficiency ? because ? the ? inductor ? and ? low \ side ? mosfet ? are ? not ? sinking ? power ? from ? the ? output ? capacitors ? at ? light ? loads. ? when ? diode \ emulation ? is ? activated ? if ? phase \ 1b ? is ? active ? (i.e. ? phase \ shedding ? is ? not ? active), ? pwm \ 1b ? becomes ? tri \ state ? and ? phase \ 1a ? goes ? into ? constant \ on \ time ? mode ? simultaneously. ?? in ? diode \ emulation ? mode, ? if ? vout ? drops ? below ? a ? certain ? threshold ? (le_th) ? due ? to ? applying ? a ? load, ? the ? operation ? is ? switched ? to ? pwm ? instantly. ?? industry ? standard ? tri \ state ? drivers ? typically ? have ? slow ? tri \ state ? entry ? times, ? typically ? which ? allows ? negative ? current ?? to ? build ? up ? reducing ? efficiency ? and ? causing ? ringing. ?? the ? off_time_adjust ? variable ? allows ? the ? designer ? to ? compensate ? for ? the ? tri \ state ? delay ? by ? reducing ? the ? low \ side ? fet ? on \ time ? by ? an ? equivalent ? amount. ?? ? figure ? 32: ? ps2 ? active ? diode ? emulation ? mode ? faults ? & ? protection ? the ? comprehensive ? fault ? coverage ? of ? the ? IR36021 ? protects ? the ? vr ? against ? a ? variety ? of ? fault ? conditions. ? faults ? are ? user ? configurable ? through ? the ? gui ? which ? also ? displays ? the ? fault ? status. ? there ? are ? two ? types ? of ? fault ? monitoring ? registers. ? in ? addition ? to ? real \ time ? fault ? registers, ? there ? are ? ?sticky? ? fault ? registers ? that ? can ? only ? be ? cleared ? with ? an ? i2c ? command ? or ? 3.3v ? power ? cycle. ? these ? will ? indicate ? if ? any ? fault ? has ? occurred ? since ? the ? last ? power ? cycle, ? even ? if ? the ? fault ? has ? cleared ? itself ? and ? the ? vr ? has ? resumed ? normal ? operation. ? table ? 12 ? lists ? the ? available ? faults. ? t able ? 12: ? s ticky ? & ? n on \ s ticky ? faults ? register ? type ? faults ? sticky ? otp, ? ocp, ? ovp, ? uvp, ? vin ? uvlo, ? 3.3v ? uvlo, ? phase \ fault, ? slow \ ocp ? non \ sticky ? ? the ? controller ? has ? two ? programmable ? modes ? for ? determining ? how ? the ? controller ? responds ? to ? faults ? on ? the ? two ? loops. ? in ? combined ? mode, ? an ? over \ current ? or ? under \ voltage ? fault ? on ? either ? loop ? will ? trigger ? the ? programmed ? response ? on ? both ? loops ? (figure ? 35). ? in ? individual ? mode, ?? a ? loop ? will ? respond ? only ? to ? its ? own ? over \ current ? or ? under \ voltage ? fault ? independent ? from ? the ? other ? loop. ? input ? under \ voltage ? on ? 3.3v ? or ? vin ? supplies, ? over \ voltage ? on ? either ? loop ? or ? an ? over \ temperature ? fault ? on ? controllers ? with ? single ? temperature ? sense ? will ? always ? shut ? down ? both ? loops. ?? output ? over \ voltage ? protection ? (ovp) ? ? if ? the ? output ? voltage ? exceeds ? a ? user \ programmable ? threshold ? (table ? 15) ? above ? the ? set \ point, ? the ? IR36021 ? detects ? an ? output ? over \ voltage ? fault ? and ? latches ? on ? the ? low \ side ? mosfets ? to ? limit ? the ? output ? voltage ? rise ? based ?? on ? the ? settings ? in ? table ? 13. ? t able ? 13: ? ovp ? a ction ? ovp ? action ? low \ side ? mosfet ? latched ? on ? low \ side ? mosfet ? on ? until ? output<0.248v ? ? under ? ovp ? conditions, ? the ? low \ side ? mosfets ? can ? be ? configured ? to ? remain ? latched ? indefinitely ? (figure ? 33) ? or ? remain ? latched ? on ? until ? the ? output ? voltage ? falls ? below ? the ? threshold ? at ? which ? time ? the ? low \ side ? mosfets ? are ? released ? (figure ? 34). ? this ? release ? mode ? can ? reduce ? or ? prevent ? undershoot ? of ? the ? output ? voltage. ? in ? the ? release ? mode, ? if ? the ? output ? voltage ? rises ? above ? the ? ovp ? level ? the ? low ? side ? mosfet?s ? will ? again ? be ? turned ? on ? until ? vout ? drops ? below ? the ? release ? threshold ? level. ?? during ? soft \ start, ? ovp ? is ? triggered ? at ? the ? fixed ? soft \ start ? level. ? this ? level ? can ? be ? chosen ? from ? three ? different ? values ? of ? 1.275v, ? 1.2v ? or ? 1.35v. ? optionally, ? the ? ovp ? may ? be ? allowed ? to ? remain ? active ? while ? the ? IR36021 ? is ? disabled ? to ? prevent ? system ? leakage ? from ? over \ voltaging ? the ? output ? (table ? 14). ? vout1 measured voltage representing i_inductor_phase-1a pwm-1a programmed on-time calculated low- side fet on-time zero-crossing prediction at the correct time
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 28 note ? that ? when ? en ? is ? pulled ? low, ? the ? device ? ramps ? down ? vout. ? during ? this ? time ? ovp ? level ? is ? equal ? to ? the ? reference ? voltage ? (which ? is ? ramping ? down) ? plus ? the ? selected ? threshold ? (table ? 15). ? when ? the ? soft \ stop ? is ? done, ? the ? level ? is ? switched ? to ? fixed ? ovp ? level. ?? ovp ? is ? disabled ? whenever ? vout ? is ? ramped ? down ? using ? i2c ? or ? pmbus ? commands. ? t able ? 14: ? ovp ? o ptions ? ovp_when \ disabled ? setting ? when ? active ? on ? ic ? disabled ? & ? ic ? enabled ? off ? ic ? enabled ? ? ? figure ? 33: ? external ? bias ? caused ? ovp2, ? which ? shuts ? down ? both ? loops ? (en2=low), ? low \ side ? mosfet ? latched ? on ? for ? loop2 ? ? figure ? 34: ? external ? bias ? caused ? ovp2, ? which ? shuts ? down ? both ? loops ? (en2=low), ? mosfet ? released ? when ? output<0.3v ? for ? loop2 ? output ? under \ voltage ? protection ? (uvp) ? the ? IR36021 ? detects ? an ? output ? under \ voltage ? condition ?? if ? the ? sensed ? voltage ? at ? the ? cpu ? is ? below ? the ? user \ programmable ? uvp ? threshold ? (table ? 15) ? or ? a ? fixed ? 248mv ? as ? defined ? by ? the ? vid ? setting ? and ? with ? or ? without ? the ? load ? line ? (using ? the ? fixed ? or ? programmable ? threshold, ? and ? the ? load ? line ? term ? is ? user ? selectable). ? upon ? detecting ? an ? output ? under \ voltage ? condition, ? the ? IR36021 ? responds ? in ? the ? same ? manner ? as ? the ? ocp, ? according ? to ? the ? setting ? selected ? in ? table ? 16. ? t able ? 15: ? ovp/uvp ? t hresholds ? value ? threshold ? 0 ? 150mv ? 1 ? 200mv ? 2 ? 250mv ? 3 ? 325mv ? 4 ? 350mv ? 5 ? 375mv ? 6 ? 400mv ? 7 ? 500mv ? ? over \ current ? protection ? (ocp) ? the ? IR36021 ? provides ? a ? user ? defined ? output ? over \ current ? protection ? limit ? up ? to ? a ? maximum ? value ? of ? 62a ? per ? phase ? per ? loop. ? for ? example, ? with ? 2 ? phases, ? the ? ocp ? maximum ? would ? be ? 62a*2 ? phases ? = ? 124a. ? to ? set ? the ? ocp ? current ? threshold, ? the ? current ? handeling ? capability ? of ? the ? power ? stages, ? the ? inductor ? and ? the ? input ? supply ? should ? be ? considered. ?? the ? controller ? action ? in ? ocp ? is ? configurable ? as ? shown ? in ? table ? 16. ?? t able ? 16: ? ocp ? & ? uvp ? m ode ? s election ? ocp/uvp ? behavior ? mode ? per ? phase ? ocp ? threshold ? (0 ? to ? 62a) ? shutdown ? immediately ?? (cycle ? power ? or ? enable ? to ? restart) ? hiccup ? 2x ? before ? shutdown ? hiccup ? indefinitely ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 29 figure ? 35: ? ocp ? on ? loop ? #2 ? shuts ? down ? both ? loops ? slow ? current ? limit ? in ? addition ? to ? the ? (fast) ? ocp, ? a ? slow ? current ? limit ? can ? be ? programmed ? to ? monitor ? and ? protect ? against ? the ? long \ term ? average ? current ? (table ? 17). ? this ? allows ? the ? system ? designer ? to ? operate ? closer ? to ? the ? tdp ? level ? (thermal ? design ? power) ? of ? the ? system. ? t able ? 17: ? s low ? ocp ? mtp ? register ? function ? slow_imax ? = ? 0 ? disabled ? slow_imax ? = ? non \ zero ? slow ? ocp ? range ? 2a ? to ? 62a ?? per ? phase ? in ? 2a ? steps ? ? the ? fast ? ocp ? threshold ? should ? be ? set ? reasonabely ? above ? the ? slow ? ocp ? threshold ? to ? prevent ? the ? instantaneous ? current ? spikes ? from ? tripping ? ocp. ? the ? fast ? ocp ? comparator ? has ? a ? 60khz ? low \ pass ? filter ? and ? the ? slow ? ocp ? comparator ? has ? a ? lpf ? with ? a ? programable ? band \ width ? of ? 52hz ? or ? 3.2hz. ?? when ? the ? slow ? ocp ? is ? tripped, ? the ? vr ? will ? shut ? down ? based ? upon ? the ? ocp ? behavior ? set ? in ? table ? 16. ? note ? that ? the ? slow ? ocp ? protection ? is ? disabled ? during ? start ? up ? and ? during ? vid ? transitions. ? in ? addition, ? depending ? on ? the ? revision ? of ? the ? the ? gui, ? the ? current ? thresholds ? for ? ocp ? might ? be ? set ? per ? phase ? or ? per ? rail. ?? vr_hot ? and ? over ? temperature ? protection ? (otp) ? the ? IR36021 ? provides ? a ? temperature ? measurement ? capability ? at ? the ? tsen ? pin ? that ? is ? used ? for ? over ? temperature ? protection, ? vr_hot ? flag ? and ? temperature ? monitoring ? on ? loop ? one. ? the ? temperature ? is ? measured ? with ? an ? ntc ? network ? that ? can ? be ? positioned ? close ? to ? thermal ? hot ? spot. ? the ? thresholds ? are ? programmable ? in ?? 1c ? increments ? as ? shown ? in ? table ? 18. ? if ? the ? measured ? temperature ? exceeds ? the ? otp ? threshold, ? the ? IR36021 ? will ? latch ? off ? the ? vr ? (cycle ? system ? power ? or ? enable ? to ? restart). ? t able ? 18: ? vr_hot ? & ? otp ? function ? vr_hot ? polarity ? vr_hot ? threshold ? (64c ? to ? 127c) ? otp ? threshold ? (vr_hot ? + ? 0c ? to ? 32c) ? max ? 134c ? ? the ? IR36021 ? includes ? a ? pre \ programmed ? look \ up ? table ? that ? is ? optimized ? for ? the ? recommended ? ntc ? options ? shown ? in ? table ? 19. ? the ? ntc ? network ? is ? connected ? to ? the ? tsen ? pin ? as ? shown ? in ? figure ? 36. ? a ? 0.01uf ? capacitor ? is ? recommended ? to ? filter ? noise. ? t able ? 19: ? ntc ? t emperature ? s ense ? r ange ? ntc ? value ? r parallel ? murata ? ncp15wb473f03rc ? or ? panasonic ? ert \ j0ep473j ? 47k ? 13k ? ? tsen 100a r parallel r ntc 0.01f 5 ohm ? figure ? 36: ? temperature ? sense ? ntc ? network ? icritical ? flag ? the ? IR36021 ? vr_hot_icrit ? pin ? can ? be ? optionally ? programmed ? to ? assert ? when ? a ? user ? programmable ? output ? current ? level ? is ? exceeded. ? the ? assertion ? is ? not ? a ? fault ? and ? the ? vr ? continues ? to ? regulate. ? i_critical ? monitors ? a ? long ? term ? averaged ? output ? current ? which ? is ? a ? useful ? indicator ? of ? average ? operating ? current ? and ? thermal ? operation. ? the ? user ? can ? select ? between ? two ? i_critical ? filters ? bandwidths, ? which ? is ? called ? telemetry \ bw. ? telemetry \ bw ? affects ? other ? readings/measurements ? like: ? slow \ ocp, ? vin/vout ? reading, ? and ? temperature ? measurement. ? (table ? 20). ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 30 t able ? 20: ? t elemetry ? band \ width ? 52hz ? / ? slow ? 3.2hz ? / ? very ? slow ? refer ? to ? electrical ? table ? for ? iout ? filter ? values ? i_critical ? has ? a ? 5% ? hysteresis ? level ? and ? the ? vr_hot_icrit ? pin ? will ? de \ assert ? when ? the ? average ? output ? current ? level ? drops ? below ? 95% ? of ? the ? programmed ? current ? level ? threshold. ?? pin ? critical ? flag ? additionally ? the ? IR36021 ? can ? be ? programmed ? to ? assert ? vr_hot_icrit ? pin ? when ? a ? user ? programmable ? input ? power ? level ? is ? exceeded. ? the ? assertion ? is ? not ? a ? fault ? and ? the ? vr ? continues ? to ? regulate. ? pin_critical ? monitors ? a ? long ? term ? average ? input ? power ? as ? calculated ? from ? the ? output ? current. ? the ? equation ? below ? shows ? the ? calculation ? performed ? by ? the ? ic ? to ? determine ? the ? average ? input ? power. ? p in iout d ? ? v i n where ? d ? is ? the ? duty ? cycle ? and ?? is ? the ? efficiency ? (fixed ? at ? 85%). ? the ? pin_critical ? power ? level ? can ? be ? programmed ? in ? mtp ? in ? 4w ? steps ? up ? to ? 252w, ? and ? if ? set ? (must ? be ? >4w), ? is ? wired ? or?d ? into ? the ? vr_hot_icrit ? pin. ? pin_critical ? has ? a ? fixed ? 4w ? hysteresis ? level ? and ? the ? vr_hot_icrit ? pin ? will ? de \ assert ? when ? the ? power ? level ? drops ? 4w ? below ? the ? programmed ? input ? power ? level ? threshold. ? vr_hot_icrit ? pin ? functionality ? options ? the ? functionality ? of ? the ? vr_hot_icrit ? pin ? can ? be ? set ? to ? assert ? when ? levels ? of ? temp_max, ? icc_max, ? and/or ? ocp ? levels ? are ? exceeded. ? table ? 21 ? shows ? the ? multiple ? configurations ? of ? the ? vr_hot_icrit ? pin. ? t able ? 21: ? vr_hot_icrit ? p in ? o ptions ? temp_max ? only ? temp_max ? or ? icc_max ? temp_max ? or ? ocp ? icc_max ? only ? ? ? input ? over \ voltage ? protection ? IR36021 ? monitors ? the ? input ? voltage ? (12v ? main ? power ? supply) ? via ? vinsen ? pin. ? if ? input ? under \ voltage ? protections ? is ? enabled, ? the ? vinsen ? pin ? is ? compared ? to ? a ? fixed ? threshold ? and ? the ? ic ? will ? shut ? down ? if ? the ? threshold ? is ? exceeded(table ? 22). ?? t able ? 22: ? i nput ? o ver \ voltage ? o ptions ? ? threshold ? with ? 14:1 ? divider ? threshold ? with ? 22:1 ? divider ? disabled ? \? \? enabled ? 14.5v ? 23.5v ? ? i2c/pmbus ? communication ? the ? IR36021 ? simultaneously ? supports ? i2c ? and ? pmbus ? through ? the ? use ? of ? exclusive ? addressing. ? the ? i2c ? and ? pmbus ? address ? for ? the ? IR36021 ? is ? programmed ? by ? mtp ? bits ? (i2c_addr<6:0>) ? in ? table ? 23, ? and ? (pmbus_addr<3:0>) ? in ? table ? 24. ? this ? means ? that ? a ? motherboard ? pmbus ? master ? may ? communicate ? with ? typically ? up ? to ? 8 ? dual ? loops, ? or ? if ? used ? as ? single ? loop ? controllers, ? as ? many ? as ? 16 ? IR36021 \ based ? vrs. ? optionally, ? a ? resistor ? offset ? can ? be ? enabled ? as ? shown ? in ? tables ? 25 ? and ? 26 ? (note ? that ? a ? 0.01uf ? capacitor ? is ? required ? across ? the ? resistor ? per ? figure ? 37). ? as ? an ? example, ? setting ? a ? base ? i2c ? address ? of ? 28h ? with ? a ? resistor ? offset ? of ? +15 ? sets ? the ? i2c ? address ? to ? 37h. ? similarly ? setting ? a ? base ? pmbus ? address ? of ? 40h ? with ? a ? resistor ? offset ? of ? +15 ? sets ? the ? pmbus ? address ? to ? 77h. ? note ? that ? a ? single ? i2c ? address ? operates ? both ? loops ? whereas ? table ? 24 ? sets ? the ? pmbus ? address ? of ? loop ? 1, ? while ? loop ? 2 ? is ? offset ? higher ? by ? the ? chip_addr_offset ? register ? which ? is ? defaulted ? to ? 1. ?? offset addr chip pmaddress pmaddress loop loop _ _ 1 2 ? ? ?? the ? IR36021 ? can ? also ? set ? the ? i2c ? address ? independently ? from ? the ? pmbus ? address. ? by ? using ? a ? 7 \ bit ? address ? the ? user ? can ? configure ? the ? device ? to ? any ? one ? of ? 127 ? different ? i2c ? addresses. ? note ? that ? i2c ? address ? 00h ? is ? not ? allowed. ? this ? is ? an ? i2c ? broadcast ? address. ? setting ? the ? i2c ? address ? to ? 00h ? forces ? the ? i2c ? address ? to ? follow ? the ? pmbus ? address ? per ? table ? 24. ? once ? the ? address ? of ? the ? IR36021 ? is ? set, ? it ? is ? locked ? to ? protect ? it ? from ? being ? overridden. ?? for ? unprogrammed ? devices, ? the ? i2c/pmbus ? address ? can ?? be ? temporarily ? forced ? to ? address ? 0ah ? for ? i2c ? and ? 0dh ? for ? pmbus ? by ? setting ? en=vr_hot=low. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 31 t able ? 23: ? i2c ? a ddressing ? register ? setting ? i2c_addr<6:0> ? controller ? i2c ?? 7 \ bit ? address ? i2c_addr<6:0> ? is ? non \ zero* ? i2c_addr<6:0> ? test ? mode ? (en=vr_hot=low) ? 0a ? hex ? * ? note ? address ? 00h ? is ? not ? allowed. ? this ? is ? the ? i2c ? broadcast ? address. ? t able ? 24: ? pmb us ? a ddressing ? register ? setting ? pm_addr<3:0> ? calculated ? 8 \ bit ? address ? code ? pmbus ? 7 \ bit ? address ? (loop1) ? i2c ?? 7 \ bit ? address ? when ? tied ? to ? pmbus 1 ? 1111 ? 1110 ? 1110 ? 77 ? hex ? 37 ? hex ? 1110 ? 1110 ? 1100 ? 76 ? hex ? 36 ? hex ? 1101 ? 1110 ? 1010 ? 75 ? hex ? 35 ? hex ? 1100 ? 1110 ? 1000 ? 74 ? hex ? 34 ? hex ? 1011 ? 1110 ? 0110 ? 73 ? hex ? 33 ? hex ? 1010 ? 1110 ? 0100 ? 72 ? hex ? 32 ? hex ? 1001 ? 1110 ? 0010 ? 71 ? hex ? 31 ? hex ? 1000 ? 1110 ? 0000 ? 70 ? hex ? 30 ? hex ? 0111 ? 1000 ? 1110 ? 47 ? hex ? 2f ? hex ? 0110 ? 1000 ? 1100 ? 46 ? hex ? 2e ? hex ? 0101 ? 1000 ? 1010 ? 45 ? hex ? 2d ? hex ? 0100 ? 1000 ? 1000 ? 44 ? hex ? 2c ? hex ? 0011 ? 1000 ? 0110 ? 43 ? hex ? 2b ? hex ? 0010 ? 1000 ? 0100 ? 42 ? hex ? 2a ? hex ? 0001 ? 1000 ? 0010 ? 41 ? hex ? 29 ? hex ? 0000 ? 1000 ? 0000 ? 40 ? hex ? 28 ? hex ? en=vr_hot=low ? 0001 ? 1010 ? 0d ? hex ? 0a ? hex ? ? 1 : ? this ? i2c ? address ? only ? takes ? effect ? if ? register ? 0x12[6:0] ? =0000000 ? ? t able ? 25: ? i2c ? o ffset ? o ptions ? enable_i2c ? addr_offset ? mtp ? bit ? i2c ? address ? offset ? 0 ? disabled ? 1 ? enabled ? ? ? ? figure ? 37: ? addr_prot ? pin ? components ? ? real \ time ? i2c ? monitoring ? functions ? IR36021 ? provides ? real \ time ? accurate ? measurement ? of ? input ? voltage, ? input ? current, ? output ? voltage, ? output ? current ? and ? temperature ? over ? the ? i2c ? interface. ? output ? voltage ? is ? calculated ? based ? upon ? the ? vid ? setting ? and ? loadline ? and ? the ? result ? is ? reported ? through ? the ? i2c. ?? t able ? 26: ? addr_prot ? r esistor ? o ffset ? ? addr_prot ? resistor ? i2c ? address ? offset ? 0.845k ?? +0 ? 1.30k ?? +1 ? 1.78k ?? +2 ? 2.32k ?? +3 ? 2.87k ?? +4 ? 3.48k ?? +5 ? 4.12k ?? +6 ? 4.75k ?? +7 ? 5.49k ?? +8 ? 6.19k ?? +9 ? 6.98k ?? +10 ? 7.87k ?? +11 ? 8.87k ?? +12 ? 10.00k ?? +13 ? 11.00k ?? +14 ? 12.10k ?? +15 ? *note: ? extends ? the ? range ? of ? pmbus ? addresses. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 32 accuracy ? optimization ? registers ? the ? IR36021 ? provides ? excellent ? factory \ trimmed ? chip ? accuracy. ? in ? addition, ? the ? designer ? has ? calibration ? capability ? that ? can ? be ? used ? to ? optimize ? accuracy ? for ? a ? given ? design ? with ? minimum ? component ? changes. ? once ? a ? design ? has ? been ? optimized ? the ? IR36021 ? will ? provide ? excellent ? repeatability ? from ? board ? to ? board. ? the ? IR36021 ? also ? provides ? the ? capability ? for ? individual ? board ? calibration ? and ? programming ? in ? production ? for ? the ? best ? accuracy. ? table ? 27 ? shows ? the ? mtp ? registers ? used ? to ? fine ? tune ? the ? accuracy ? of ? the ? reported ? measurements. ? figures ? 38 ? to ? 40 ? show ? the ? typical ? accuracy ? of ? the ? output ? current, ? input ? voltage ? and ? output ? voltage ? measurements ? using ? the ? IR36021. ? t able ? 27: ? a ccuracy ? o ptimization ? r egisters ? nvm ? register ? function ? iin ? fixed ? offset ? offsets ? the ? input ? current ? in ? 1/32a ? steps ? e.g. ? driver ? icc ? which ? can ? be ? 5 \ 8ma ? per ? driver ? iin ? per ? phase ? offset ? offsets ? the ? input ? current ? dependent ? upon ? the ? number ? of ? active ? phases ? in ? 1/128a ? steps ? e.g. ? the ? drive ? current ? for ? the ? mosfet ? s. ? this ? current ? increases ? every ? time ? a ? new ? phase ? is ? added ? iout ? current ? offset ? offsets ? the ? output ? current ? from ?? \ 8a ? to ? +7.5a ? in ? 0.5a ? steps ? (loop ? 1) ? and ? \ 4a ? to ? +3.75a ? 0.25a ? steps ? (loop ? 2) ? vout ? offset ? offsets ? the ? output ? voltage ? +40mv ? to ?\ 35mv ? in ? 5mv ? steps. ? temperature ? offset ? offsets ? the ? temperature ? in ? 1c ? steps ? e.g. ? to ? compensate ? for ? offset ? between ? the ? hottest ? component ? and ? the ? ntc ? sensing ? location. ? ? -20% -15% -10% -5% 0% 5% 10% 15% 20% 0 102030405060708090100 error e-load (a) iout error cpu spec with 7% inductors ? figure ? 38: ? i2c ? i out ? error ? using ? 10% ? dcr ? inductors ? ? ? -1.0% -0.5% 0.0% 0.5% 1.0% 11.7 11.8 11.9 12 12.1 12.2 12.3 0 20406080100 error vin (v) e-load (a) vin (dmm) vin (i2c) vin error (2nd axis) ? figure ? 39: ? i2c ? input ? voltage ? measurements ? -1.00% -0.75% -0.50% -0.25% 0.00% 0.25% 0.50% 0.75% 1.00% 0.850 0.875 0.900 0.925 0.950 0.975 1.000 1.025 1.050 0 20406080100 error vout (v) e-load (a) vout (dmm) vout (i2c) vout error (2nd axis) ? figure ? 40: ? i2c ? output ? voltage ? measurements ? i2c ? security ? the ? IR36021 ? provides ? robust ? and ? flexible ? security ? options ?? to ? meet ? a ? wide ? variety ? of ? customer ? applications. ?? a ? combination ? of ? hardware ? pin ? and ? software ? password ? prevents ? accidental ? overwrites, ? discourages ? hackers, ?? and ? secures ? custom ? configurations ? and ? operating ? data. ?? the ? read ? and ? write ? security ? zones ? can ? be ? in ? set ? in ? mtp ? (tables ? 28 ? and ? 29) ? with ? the ? protection ? methods ? shown ?? in ? table ? 30. ? t able ? 28: ? r ead ? s ecurity ? z ones ? zone ? access ? when ? locked ? unlocked ? open ? all ? all ? configuration ? control ? & ? telemetry ? all ? telemetry ? telemetry ? all ? secure ? none ? all ? ? ? ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 33 ? t able ? 29: ? w rite ? s ecurity ? z ones ? zone ? access ? when ? locked ?? unlocked ? open ? all ? all ? configuration ? control ? & ? telemetry ? all ? secure ? none ? all ? ? t able ? 30: ? r ead ? or ? w rite ? u nlock ? o ptions ? password ? only ? pin ? only ? pin ? & ? password ? lock ? forever ? ? password ? protection ? the ? system ? designer ? can ? set ? any ? 16 \ bit ? password ? (other ? than ? 00h) ? and ? this ? is ? stored ? in ? mtp ? (table ? 31). ? to ? unlock, ? a ? user ? must ? write ? the ? correct ? password ? into ? the ? ?password ? try? ? register ? which ? is ? a ? volatile ? read/write ? register. ? to ? lock, ? write ? an ? incorrect ? password ? into ? the ? ?password ? try? ? register. ? after ? a ? certain ? number ? of ? incorrect ? tries, ? the ? ic ? will ? lock ? up ? to ? prevent ? unauthorized ? access. ? t able ? 31: ? p assword ? r egisters ? register ? length ? location ? password ? 16 ? bit ? (2 ? bytes) ? mtp ? try ? 16 ? bit ? (2 ? bytes) ? r/w ? ? the ? following ? pseudo \ code ? illustrates ? how ? to ? change ?? a ? password: ? # ? first ? unlock ? the ? ic ? write ? old ? password ? high ? byte ? to ? r/w ? high ? byte ? try ? register ? write ? old ? password ? low ? byte ? to ? r/w ? low ? byte ? try ? register ? # ? now ? write ? new ? password ? into ? mtp ? write ? new ? password ? high ? byte ? to ? high ? byte ? mtp ? register ? # ? password ? has ? changed! ? must ? unlock ? to ? change ? the ? low ? byte ? write ? new ? password ? high ? byte ? to ? r/w ? high ? byte ? try ? register ? write ? new ? password ? low ? byte ? to ? low ? byte ? mtp ? register ? # ? password ? change ? complete, ? status ? is ? locked ? #need ? to ? write ? new ? low ? byte ? to ? try ? register ? to ? unlock ? ? pin ? protection ? the ? addr_prot ? pin ? is ? a ? dual ? function ? pin. ? when ? the ?? ic ? is ? enabled, ? the ? resistor ? value ? is ? latched ? and ? stored ? for ? use ? in ? the ? i2c ? address ? offset ? function. ? thereafter, ? the ? pin ? acts ? entirely ? as ? a ? protect ? pin. ? if ? enabled, ? the ? protect ? pin ? must ? be ? driven ? high ? to ? unlock ? and ? low ? to ? lock. ? note, ?? if ? the ? resistor ? address ? offset ? function ? is ? being ? used, ? care ? must ? be ? taken ? to ? allow ? the ? ic ? to ? read ? the ? resistor ? value ? before ? driving ? the ? pin ? high ? or ? low ? to ? set ? the ? security ? state ? otherwise ? an ? erroneous ? address ? offset ? value ? may ? be ? latched ? in. ? the ? user ? should ? wait ? until ? at ? least ? the ? completion ? of ? the ? auto \ trim ? time ? t 4 ? in ? figure ? 8. ? gamer ? mode ? & ? margining ? IR36021 ? supports ? a ? pmbus ? gamer ? command ? for ? flexible ? over \ clocking ? over ? an ? extended ? vid ? range. ? system ? firmware ? can ? use ? this ? command ? to ? enable ? and ? disable ? ?gamer ? mode?. ? when ? gamer ? mode ? is ? enabled, ? the ? output ? voltage ? transitions ? from ? the ? current ? value ? to ? the ? value ? specified ? by ? the ? gamer ? command ? . ? the ? gamer ? vid ? is ? represented ? as ? a ? 9 \ bit ? word ? given ? by ? the ? formula: ? mv stepsize where v . max v to vid for stepsize ) vid ( v gamer gamer 5 3 2 460 1 1 ? ? ? ? ? ? ? the ? designer ? may ? also ? configure ? a ? maximum ? vout ? (table ? 32) ? to ? protect ? the ? vr ? from ? exceeding ? the ? programmed ? voltage ? regardless ? of ? the ? commanded ? vid ? and ? offset. ?? the ? gamer ? command ? may ? be ? used ? to ? set ? the ? controller ? to ? either ? override ? or ? track ? the ? current ? vid ? (set ? by ? manual_vid ? registers). ? in ? override ? mode, ? the ? IR36021 ? sets ? the ? output ? voltage ? defined ? by ? the ? gamer ? vid ? and ? ignores ? the ? manual_vid ? registers. ? in ? track ? mode, ? the ? output ? voltage ? is ? initially ? set ? to ? the ? gamer ? vid ? and ? any ? subsequent ? changes ? to ? the ? manual_vid ? registers ? cause ? the ? same ? offset ? changes ? in ? the ? gamer ? vid. ? the ? IR36021 ? gamer ? command ? also ? provides ? overclockers ? the ? ability ? to ? minimize ? droop ? by ? digitally ? scaling ? the ? loadline ? to ? 80%, ? 60% ? or ? 0% ? (disable) ? of ? the ? nominal ? value. ? a ? summary ? of ? the ? pmbus ? gamer ? command ? is ? shown ? in ? table ? 33. ? note ? that ? sending ? a ? gamer ? command ? does ? not ? change ? the ? output ? voltage ? when ? the ? device ? is ? in ? margining ? mode. ? the ? command ? will ? take ? effect ? when ? the ? device ? comes ? out ? of ? margining ? mode. ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 34 ? t able ? 32: ? o verclock ? v max ? register ? value ? vmax ?? 0 ? 0.645 ? 1 ? 0.765 ? 2 ? 0.885 ? 3 ? 1.005 ? 4 ? 1.125 ? 5 ? 1.245 ? 6 ? 1.365 ? 7 ? 1.485 ? 8 ? 1.605 ? 9 ? 1.725 ? 10 ? 1.845 ? 11 ? 1.965 ? 12 ? 2.085 ? 13 ? 2.205 ? 14 ? 2.325 ? 15 ? 2.445 ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? t able ? 33: ? g amer ? c ommand ? f ormat ? bits ? function ? 15 \ 13 ? reserved. ? always ? set ? to ? ?001?b ? 12 ? gamer ? mode ? enable/disable ? 11 ? vid ? follow ? or ? vid ? override ? mode ? 10:9 ? loadline ? scale ? 100%, ? 80%, ? 60%, ? 0% ? 8:0 ? gamer ? vid[8:0] ? ? overclock ? mode ? recovery ? raising ? the ? cpu ? voltage ? to ? achieve ? higher ? performance ? or ? lowering ? the ? cpu ? voltage ? to ? save ? power ? can ? result ? in ? a ? system ? crash. ? the ? IR36021 ? contains ? a ? safety ? mechanism ? whereby ? the ? overclock ? mode ? is ? immediately ? disabled ? any ? time ? the ? enable ? pin ? is ? driven ? low ? (typically ? by ? a ? system ? restart). ? this ? ensures ? that ? the ? cpu ? starts ? at ? the ? proper ? boot ? vid. ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 35 i2c ? protocols ? ? ? all ? registers ? may ? be ? accessed ? using ? either ? i2c ? or ? pmbus ? protocols. ? i2c ? allows ? the ? use ? of ? a ? simple ? format ? whereas ? pmbus ? provides ? error ? checking ? capability. ? figure ? 41 ? shows ? the ? i2c ? format ? employed ? by ? the ? IR36021. ? ? figure ? 41: ? i2c ? format ? ? smbus/pmbus ? protocols ? to ? access ? ir?s ? configuration ? and ? monitoring ? registers, ? 4 ? different ? protocols ? are ? required: ? ? the ? smbus ? read/write ? byte/word ? protocol ? with/without ? pec ? (for ? status ? and ? monitoring) ? ? the ? smbus ? send ? byte ? protocol ? with/without ? pec ? (for ? clear_faults ? only) ? ? the ? smbus ? block ? read ? protocol ? for ? accessing ? model ? and ? revision ? information ? ? the ? smbus ? process ? call ? (for ? accessing ? configuration ? registers) ? an ? explanation ? of ? which ? command ? codes ? and ? protocols ? are ? required ? to ? access ? them ? is ? given ? in ? table ? 34. ?? in ? addition, ? the ? IR36021 ? supports: ? ? alert ? response ? address ? (ara) ? ? bus ? timeout ? (10ms) ? ? group ? command ? for ? writing ? to ? many ? vrs ? within ? one ? command ? ? ? figure ? 42: ? smbus ? write ? byte/word ??
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 36 ? ?? figure ? 43: ? smbus ? read ? byte/word ? ? figure ? 44: ? smbus ? send ? byte ? ? figure ? 45: ? smbus ? block ? read ? with ? byte ? count=1 ? a a a 1 register address 88 data ? byte s slave address w command ? d0h 17 1 8 a a 11 11 register ? address data ? byte ? 8 sr r 171 18 ? p n 11 slave address a ? figure ? 46: ? smbus ? process ? call ? to ? write ? an ? ir ? register ? ? figure ? 47: ? smbus ? process ? call ? to ? read ? an ? ir ? register ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 37 ? figure ? 48: ? group ? command ? t able ? 34: ? pmb us ? c ommands ? command ? pmbus ? protocol ? command ? code ? description ? operation ? read/write ? byte ? 01h ? enables ? or ? disables ? IR36021 ? output ? and ? controls ? margining ? clear ? faults ? send ? byte ? 03h ? clear ? contents ? of ? fault ? registers ? capability ? read ? byte ? 19h ? returns ? 1010xxxx ? to ? indicate ? packet ? error ? checking ? is ? supported ? and ? maximum ? bus ? speed ? is ? 400khz ? vout_mode ? read/write ? byte ? 20h ? sets ? the ? vout ? format ? to ? linear ? mode ? for ? the ? read_vout, ? vout_margin_low, ? vout_margin_high ? commands ? the ? default ? is ? linear ? mode ? with ? exponent ?\ 9. ? linear ? mode: ? exponent ? of ? 1 ? to ?\ 16 ? is ? supported ? vout_margin_high ? read/write ? word ? 25h ? sets ? the ? high ? voltage ? when ? commanded ? by ? operation. ? works ? in ? conjunction ? with ? vout_mode. ? vout_margin_low ? read/write ? word ? 26h ? sets ? the ? low ? voltage ? when ? commanded ? by ? operation. ? works ? in ? conjunction ? with ? vout_mode. ? status_byte ? read/write ? byte ? 78h ? returns ? 1 ? byte ? where ? the ? bit ? meanings ? are: ? bit ? <7> ? device ? busy ? fault ? bit ? <6> ? output ? off ? (due ? to ? fault ? or ? enable) ? bit ? <5> ? output ? over \ voltage ? fault ? bit ? <4> ? output ? over \ current ? fault ? bit ? <3> ? input ? under \ voltage ? fault ? bit ? <2> ? temperature ? fault ? bit ? <1> ? communication/memory/logic ? fault ? bit ? <0>: ? reserved ? status_word ? read ? word ? 79h ? returns ? 2 ? bytes ? where ? the ? low ? byte ? is ? the ? same ? as ? the ? status_byte ? data. ? the ? high ? byte ? has ? bit ? meanings ? are: ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 38 command ? pmbus ? protocol ? command ? code ? description ? bit ? <7> ? output ? high ? or ? low ? fault ? bit ? <6> ? output ? over \ current ? fault ? bit ? <5> ? input ? under \ voltage ? fault ? bit ? <4> ? reserved ? bit ? <3> ? loop ? is ? not ? ready ? bit ? <2:0> ? reserved ? status_temperature ? read/write ? byte ? 7dh ? returns ? over ? temperature ? warning ? (vr_hot ? level) ? and ? over ? temperature ? fault ? (otp ? level). ? does ? not ? report ? under ? temperature ? warning/fault. ? the ? bit ? meanings ? are: ? bit ? <7> ? over ? temperature ? fault ? bit ? <6> ? over ? temperature ? warning ? bit ? <5> ? under ? temperature ? warning ? bit ? <4> ? under ? temperature ? fault ? bit ? <3:0> ? reserved ? status_cml ? read/write ? byte ? 7eh ? returns ? 1 ? byte ? where ? the ? bit ? meanings ? are: ? bit ? <7> ? command ? not ? supported ? bit ? <6> ? reserved ? bit ? <5> ? pec ? fault ? bit ? <4:0> ? reserved ? status_mfr_specific ? read/write ? byte ? 80h ? returns ? 1 ? byte ? where ? the ? bit ? meanings ? are: ? bit ? <7:1> ? reserved ? bit ? <0> ? phase ? fault ? read_vin ? read ? word ? 88h ? returns ? the ? input ? voltage ? in ? volts1 ? read_iin ? read ? word ? 89h ? returns ? the ? input ? current ? in ? amperes1 ? read_vout ? read ? word ? 8bh ? returns ? the ? output ? voltage ? in ? the ? format ? set ? by ? vout_mode ? read_iout ? read ? word ? 8ch ? returns ? the ? output ? current ? in ? amperes ? 1 ? read_temperature_1 ? read ? word ? 8dh ? returns ? the ? addressed ? loop ? ntc ? temperature ? in ? degrees ? celsius ? 1 ? read_temperature_2 ? read ? word ? 8eh ? returns ? the ? other ? loop ? ntc ? temperature ? in ? degrees ? celsius ? 1 ? read_pout ? read ? word ? 96h ? returns ? the ? output ? power ? in ? watts1 ? read_pin ? read ? word ? 97h ? returns ? the ? input ? power ? in ? watts1 ? pmbus_revision ? read ? byte ? 98h ? reports ? pmbus ? part ? i ? rev ? 1.1 ? & ? pmbus ?? part ? ii ? rev ? 1.2(draft) ? mfr_model ? block ? read, ? byte ? count ? = ? 2 ? 9ah ? returns ? a ? 2 ? byte ? code ? with ? the ? following ? values: ? low ? byte ? always ? = ? 01h ? high ? byte ? is: ? 2dh ? = ? IR36021 ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 39 command ? pmbus ? protocol ? command ? code ? description ? mfr_revision ? block ? read, ? byte ? count ? = ? 2 ? 9bh ? returns ? a ? 2 ? byte ? code ? with ? the ? following ? values: ? low ? byte ? always ? = ? 01h ? high ? byte ? is ? the ? revision ? number ? in ? hex. ? write_register_process_call ? process ? call ? d0h ? write ? to ? configuration ? registers ? read_register_process_call ? process ? call ? d1h ? read ? from ? configuration ? & ? status ? registers ? gamer ? command ? write ? word ? d2h ? enables/disables ? gamer ? mode ? and ? associated ? options ? set_pointer ? write ? byte ? d3h ? sets ? the ? register ? address ? for ? reading/writing ? get_pointer ? read ? byte ? d4h ? reads ? 1 ? byte ? from ? the ? previously ? set ? register ? address ? write_register ? write ? word ? d5h ? writes ? 1 ? byte ? to ? the ? previously ? set ? register ? address ? set_i2c ? read/write ? byte ? d6h ? sets ? the ? 7 \ bit ? i2c ? address ? according ? to ? the ? bit ? meanings: ? bit ? <7> ? enable ? i2c ? bus ? (0 ? ? ? disable, ? 1 ? ? ? enable) ? bit<6:0> ? 7 \ bit ? i2c ? address ? read_efficiency ? read ? word ? d7h ? reports ? the ? efficiency ? in ? %1 ? mask_status_word ? read/write ? word ? d8h ? masks ? status_word ? bits. ? mask_temperature ? read/write ? byte ? d9h ? masks ? status_temperature ? mask_cml ? read/write ? byte ? dah ? masks ? status_cml ? mask_manufacturer ? read/write ? byte ? dbh ? masks ? status_mfr_specific ? note 1 ? ? ? pmbus: ? linear ? data ? format ? is ? used ?? ? 11 \ bit ? linear ? data ? format ? monitored ? parameters ? use ? the ? linear ? data ? format ? (figure ? 49) ? encoding ? into ? 1 ? word ? (2 ? bytes), ? where: ? n y value 2 ? ? ? note ? n ? and ? y ? are ? ?signed? ? values. ? if, ? vout ? is ? set ? to ? linear ? format ? (by ? vout_mode), ? then ? n ? is ? set ? by ? the ? vout_mode ? command ? and ? only ? y ? is ? returned ? in ? the ? data \ field ? as ? a ? 16 \ bit ? unsigned ? number. ? ?? ? 7 ? 6 ? 5 ? 4 ? 3 ?? 2 1 0 ? 7 6 5 4 3 2 1 ? ? figure ? 49: ? 11 \ bit ? linear ? data ? format ? databyte high databyte low n y
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 40 16 \ bit ? linear ? data ? format ? this ? format ? is ? only ? used ? for ? vout ? related ? commands ? (read_vout, ? vout_margin_high, ? vout_margin_low): ? ? n y value 2 ? ? ? note ? n ? and ? y ? are ? ?signed? ? values. ? if, ? vout ? is ? set ? to ? linear ? format ? (by ? vout_mode), ? then ? n ? is ? set ? by ? the ? vout_mode ? command ? and ? only ? y ? is ? returned ? in ? the ? data \ field ? as ? a ? 16 \ bit ? unsigned ? number. ? ? figure ? 50: ? 16 \ bit ? linear ? data ? format ? ?
IR36021 ? digital ? pol ? buck ? controller ? with ? i2c ? and ? pmbus ? interface ? february ? 27, ? 2013 ? | ? rev ? 3.5 ? 41 ? ? qfn package; 5x5-32 lead ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 this product has been designed and qualified for the consumer market. visit us at www.irf.com for sales contact information data and specifications subject to change without notice. 02/2013

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